Hi,
I would like to get some help in writing an inline assembler function
for the cmpxchg8b command. Especially for the x86 target and PIC support.
PIC (position independant code) implies that EBX must not be changed. And
the x86 target has only a limited number of registers available. And of
course the code should work regardless if we have -fomit-frame-pointer
enabled or not (so no EBP register available). So far I have the following
function:
inline int cmpxchg8b (volatile uint64_t *pu64,
const uint64_t u64New,
const uint64_t u64Old)
{
uint32_t u32EBX = (uint32_t)u64New;
uint32_t u32Spill;
__asm__ __volatile__(
/* save the EBX register to a temporary memory variable */
"xchgl %%ebx, %4\n\t"
/* ESI contains the address of the 64-bit variable */
"lock; cmpxchg8b (%6)\n\t"
/* store the result (carry flag) into AL */
"setz %%al\n\t"
/* restore EBX */
"movl %4, %%ebx\n\t"
/* AL => EAX */
"movzbl %%al, %%eax\n\t"
: "=a" (u32Ret),
"=d" (u32Spill),
# if (__GNUC__ * 100 + __GNUC_MINOR__) >= 403
/* It seems that this is really necessary starting with
* gcc-4.3. '+' means that this variable is written _and_
* read! */
"+m" (*pu64)
# else
/* gcc < 4.3 seems to not depend on '+' */
"=m" (*pu64)
# endif
: "A" (u64Old),
"m" ( u32EBX ),
"c" ( (uint32_t)(u64New >> 32) ),
"S" (pu64));
The gcc-4.3-related code is correct for older gcc versions as well.
However, gcc-4.2 will complain about 'not enough registers' if this
code is compiled with -fPIC -fno-omit-frame-pointer.
Any idea for a correct implementation?
Thanks in advance,
Frank
--
Dr.-Ing. Frank Mehnert Sun Microsystems http://www.sun.com/
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