wuxi wrote: > Andrew Haley wrote: >> >> That's right, it doesn't. What is our point? > Ahhh... that's my problem of my first question :-). I am interested in > whether ia32 binary will have such an example. > > A paper says that the drawback of linear-sweep algorithm to disassemble > a binary lies in misinterpretation of data in instruction stream. As > their prototype is based on x86 architecture, I want to get an example. :-) I see. > Besides, it says jump table may appear in the instruction stream, but at > least to my experience, I did not encounter the case in x86 binary... No, you won't because x86 jump tables are placed in rodata. I think we get better cache behaviour on some platforms by keeping data and code separate. Mind you, there are plenty of ways other than gcc to generate x86 code. Andrew.
