Re: Robust detection of endianness at compile time.

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Young, Michael wrote:
Detecting endianness at compile time - IIRC, some CPUs (MIPS and Alpha come to mind) are configurable to support either. Does anyone have any links for details on this?
(I quickly googled for it but came up short.)  I don't know if it is hardware or software
configurable,

For MIPS processors that support this feature, it is done in hardware and is usually done by strapping a pin on the processor either high or low while the processor is in a reset state. Once the processor boots you cannot change it, and it applies to all software running on the system.

Not all MIPS processors support endianness selection. I have several MIPS based systems that are hardwired little endian.

and, if it is the latter, if it's on a per-thread basis, and/or if it
can be configured by non-supervisor code.  Anyway, depending on these details, it may
be "dangerous" to assume an endianness at compile-time - or am I really missing the
mark here?

Code of the wrong endianness will just not work period. You have to know at compile time. The compile and runtime linkers will not work with code of the wrong endianness and I think that is just the beginning of the problems.

David Daney

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