Thanks Ian, I see now: for functions with many arguments (and I have seen ones with 25 args in our software!) it could be a bit more efficient have more registers to pass arguments. While Im in this discussion, I might present some other issues that I current face. We use a MPC5xx variant. Our software uses only SDA addressing for all vars and consts. This by far the most efficient , runtime and code-size wise for a RISC processor. Sutability of ARM for a load/store intensive application: =========================================================== -> If im right, ARM though RISC, does not have SDA addressing. For constants it uses PC relative addressing (which means thet constants must be embedded within text section ?). How does variable addressing happen ? Does it use two instructions (like lis and ori in PPC) to form the 32 bit address ? -> For a RISC ARM has lesser number of registers. I presume, if we have lesser registers then there will be more load/store operations. (And probably the stack is also bigger ?). Is there any way in which one can predict the number of extra load/stores due to reduced number of registers (other than compiling and measuring!) ? Misc: ======= -> Is there any open source tool which counts only executable lines of code. Is it possible to do this with gcc ? -> Is there an open source GNU C grammer. What intermediate representations (tree etc ?) can be used for the source ? Is it possible to make this persistent ? Many Thanks and Best Regards, Ravishankar -----Original Message----- From: gcc-help-owner@xxxxxxxxxxx [mailto:gcc-help-owner@xxxxxxxxxxx] On Behalf Of Ian Lance Taylor Sent: Monday, September 25, 2006 10:35 PM To: Ravishankar S Cc: gcc-help@xxxxxxxxxxx Subject: Re: Arguments in registers Ravishankar S <ravishankar.s@xxxxxxxxxxx> writes: > But TriCore's EABI specifies separate registers for passing arguments > and returning values. D2-D3 for returning values and D4-D7 for passing > arguments. > > My question is : Will it make a difference from a compiler writer's > point for this type of calling convention. From experience, will it > make for a differnce in performance. It won't make much difference. There are other architectures with similar characteristics. For example, on MIPS arguments are passed in $4 through $7 or $11 (depending on the ABI), but values are returned in $2 and $3. > On the surface, it seems like it does, as there most of functions do > not return values and most anyway don't return 64 bit values. So > reusing the registers as PowerPC does may be better. The return registers are essentially just caller-saved scratch registers. I suppose if you are short on registers you might prefer to have more callee-saved registers. But if you have enough registers, it doesn't matter much either way. Ian __________ NOD32 1.1454 (20060321) Information __________ This message was checked by NOD32 antivirus system. http://www.eset.com
