problem in gcc port based on MIPS

["kernel coder" <lhrkernelcoder@xxxxxxxxx>]

hi,
   I am trying to write the backend for a processor based on mips.I
am facing some problems during compilation of gcc.GAS has been ported
for target processor.The store word instruction  on ported assembler
only supports 16 bit offsets.i.e

the only supported format is

stw $1,16-bit-offset($2)

I modified mips backend to support stw instruction.But during the
compilation of crtstuff.c it is generating an instrucion

stw $2,p.2249

as this format of instruction is not supported on assembler,an error
for illegal operands(p.2249) is being generated.

First of all i'm not been able to understand the operand p.2249 as i'm
newbie to mips assembly.According to tc-mips.c code in GAS ,it seems
to be a 32 address,but still the syntax is not clear to me.

Where in mips backend in gcc (mips.md,mips.h,mips.c) such type of
offset(p.2249) is being generated because i need to tell the compiler
that only allowed offset for stw instruction is 16-bit and  generated
format should be

stw reg,offset(reg)

thanks,
kernelcoder