Yes of course, and as both Intel and AMD introduce new machines, we will probably need new tuning for each model. This is true of any platform that has more than one different cpu in the model family. For example, when I was working with PowerPC's and MIPS computers, each different model had different tuning options though they all had a common instruction set (or at least a common subset in the case of the MIPS). -- Michael Meissner AMD, MS 83-29 90 Central Street Boxborough, MA 01719 -----Original Message----- From: gcc-help-owner@xxxxxxxxxxx [mailto:gcc-help-owner@xxxxxxxxxxx] On Behalf Of Kevin P. Fleming Sent: Monday, October 31, 2005 8:16 PM To: MSX to GCC Subject: Re: Binary compatibility - Xeon & Opteron Meissner, Michael wrote: > Note all of the Linux 64-bit distributions only ship one set of > binaries, so the code generated by the compilers is the same. There is > at least one instruction (cmpxcg16) that Intel has that AMD doesn't, but > the compiler doesn't generate it. However, using GCC 4.x and optimizing for 'k8' vs. 'nocona' can make a noticeable performance difference. The resulting code may run on both sorts of CPUs, but the instruction scheduling is apparently quite different.
