I believe, no matter how many instructions a processor supports, only a set of them would be needed by gcc to generate assembly code for a given source. I can say this, because, we have a processor and a port of gcc for it and when the definition for one of our instruction was misinterpreted by our developers (for a processor simulator), they informed us that they will change the definition in the simulator and asked us not to worry abt the compiler as that instruction is not used in the compiler.
Thanks, Sriharsha.
James HAUXWELL wrote:
Hi,
I have a piece of code using mmx/sse intrinsics
ta = __builtin_ia32_pmaddwd(ia, one); tb = (v2si)__builtin_ia32_psrlq((di)ta, 32); dest.__v = __builtin_ia32_paddd(ta, tb); satd = dest.__a[0];
At the phase where I move the bottom 32bits of the mmx register to a normal register I should be able to use a movd instruction (according to intel documentation), but what ever I do I can't generate one. It is currently generating a movq to a memory loacation and then doing a shorter load from the same location.
should be something like.
ta = __builtin_ia32_pmaddwd(ia, one); tb = (v2si)__builtin_ia32_psrlq((di)ta, 32); satd = (int)__builtin_ia32_paddd(ta, tb);
Is anyone familiar enough with intrinsics to know why this doesn't work?
Jim
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