Iam using an arm-linux-gcc-3.3 toolchain..
This is my sample program
int main()
{
int i = 9;
i += 10;
return 0;
}
and the RTL dump after all the optimization passes
looks like this
;; Function main
(note 2 0 3 NOTE_INSN_DELETED)
(note 3 2 28 NOTE_INSN_FUNCTION_BEG)
;; Start of basic block 0, registers live: 11 [fp] 13
[sp] 25 [sfp] 26 [afp]
(note 28 3 32 [bb 0] NOTE_INSN_BASIC_BLOCK)
(insn/f 32 28 33 (nil) (set (reg:SI 12 ip)
(reg/f:SI 13 sp)) 161 {*arm_movsi_insn} (nil)
(nil))
(insn/f 33 32 34 (nil) (parallel [
(set (mem:BLK (pre_dec:BLK (reg/f:SI 13
sp)) [0 A8])
(unspec:BLK [
(reg/f:SI 11 fp)
] 2))
(use (reg:SI 12 ip))
(use (reg:SI 14 lr))
(use (reg:SI 15 pc))
]) 326 {*push_multi} (nil)
(expr_list:REG_FRAME_RELATED_EXPR (sequence [
(set/f:SI (reg/f:SI 13 sp)
(plus:SI (reg/f:SI 13 sp)
(const_int -16 [0xfffffff0])))
(set/f (mem:SI (reg/f:SI 13 sp) [0 S4
A32])
(reg/f:SI 11 fp))
(set/f (mem:SI (plus:SI (reg/f:SI 13
sp)
(const_int 4 [0x4])) [0 S4
A32])
(reg:SI 12 ip))
(set/f (mem:SI (plus:SI (reg/f:SI 13
sp)
(const_int 8 [0x8])) [0 S4
A32])
(reg:SI 14 lr))
])
(nil)))
(insn/f 34 33 35 (nil) (set (reg/f:SI 11 fp)
(plus:SI (reg:SI 12 ip)
(const_int -4 [0xfffffffc]))) 4
{*arm_addsi3} (nil)
(nil))
(insn/f 35 34 36 (nil) (set (reg/f:SI 13 sp)
(plus:SI (reg/f:SI 13 sp)
(const_int -4 [0xfffffffc]))) 4
{*arm_addsi3} (nil)
(nil))
(insn 36 35 37 (nil) (set (mem:BLK (scratch) [0 A8])
(unspec:BLK [
(reg/f:SI 13 sp)
(reg/f:SI 11 fp)
] 5)) 327 {stack_tie} (nil)
(nil))
(note 37 36 8 NOTE_INSN_PROLOGUE_END)
(insn 8 37 9 0x4001a294 (set (reg:SI 1 r1 [37])
(const_int 9 [0x9])) 161 {*arm_movsi_insn}
(nil)
(expr_list:REG_EQUAL (const_int 9 [0x9])
(nil)))
(insn 9 8 11 0x4001a294 (set (mem/f:SI (plus:SI
(reg/f:SI 11 fp)
(const_int -16 [0xfffffff0])) [0 i+0
S4 A32])
(reg:SI 1 r1 [37])) 161 {*arm_movsi_insn}
(nil)
(nil))
(insn 11 9 12 0x4001a294 (set (reg:SI 1 r1 [38])
(mem/f:SI (plus:SI (reg/f:SI 11 fp)
(const_int -16 [0xfffffff0])) [0 i+0
S4 A32])) 161 {*arm_movsi_insn} (nil)
(nil))
(insn 12 11 13 0x4001a294 (set (reg:SI 1 r1 [38])
(plus:SI (reg:SI 1 r1 [38])
(const_int 10 [0xa]))) 4 {*arm_addsi3}
(nil)
(nil))
(insn 13 12 17 0x4001a294 (set (mem/f:SI (plus:SI
(reg/f:SI 11 fp)
(const_int -16 [0xfffffff0])) [0 i+0
S4 A32])
(reg:SI 1 r1 [38])) 161 {*arm_movsi_insn}
(nil)
(nil))
(insn 17 13 21 0x4001a294 (set (reg:SI 0 r0 [39])
(const_int 0 [0x0])) 161 {*arm_movsi_insn}
(nil)
(nil))
(note 21 17 27 NOTE_INSN_FUNCTION_END)
(insn 27 21 41 0x4001a2c0 (use (reg/i:SI 0 r0)) -1
(nil)
(nil))
(insn 41 27 38 (nil) (set (reg:SI 9 r9 [0])
(const_int 3 [0x3])) -1 (nil)
(nil))
(note 38 41 39 NOTE_INSN_EPILOGUE_BEG)
(jump_insn 39 38 40 (nil) (return) 242 {return} (nil)
(nil))
;; End of basic block 0, registers live:
0 [r0] 11 [fp] 13 [sp] 25 [sfp] 26 [afp]
(barrier 40 39 31)
(note 31 40 0 NOTE_INSN_DELETED)
-----------------------------
There are two tree addresses - 0x4001a294 and
0x4001a2c0.. How are they related to each other??
I also tried inserting a RTL strcuture using the
following code
rtx rcode, insn
....
....
rcode = rtx_alloc(SET);
XEXP(rcode, 0) = rtx_alloc(REG);
PUT_MODE(XEXP(rcode, 0), SImode);
XINT(XEXP(rcode, 0), 0) = 9; /* arbitrary register
no 9 */
XEXP(rcode, 1) = rtx_alloc(CONST_INT);
XINT(XEXP(rcode, 1), 0) = 21; /* some constant
number 21 */
emit_insn_after(rcode, insn);
but it gives me an internal compiler error in the
final() function of the final.c file. so how can i
insert an instruction with tree address 0x4001a294..
what are the steps to insert an insertion in RTL form
??
I appreciate any kind of help.
kripa
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