This is great (see below), but is there a way to write out the rule as: ../../directory/c.o: c.cpp
I want to keep the object files in a separate directory from the source files.
Thank you.
------------------------------------------------------------------------- Nevermind. It's as easy as replacing the Makefile line:
$(CPP) -MM $(CPPFLAGS) `echo $$i | sed "s/\(.*\)\\.o$$/\1.cpp/"` >> depend
with:
$(CPP) -MM -MT $$i $(CPPFLAGS) `echo $$i | sed "s/\(.*\)\\.o$$/\1.cpp/"` >> depend
Sorry for the spam :)
On Wednesday 30 July 2003 12:17, Mihnea Balta wrote:
> As a side note, these two manual entries seem conflicting:
>
> The entry for the -M flag says:
> "The preprocessor outputs one make rule containing the object file name for
> that source file, a colon, and the names of all the included files [...]"
>
> The entry for the -MT flag says:
> "By default CPP takes the name of the main input file, _including any
> path_, deletes any file suffix such as .c, and appends the platform's usual
> object suffix. The result is the target."
>
> On Wednesday 30 July 2003 12:09, Mihnea Balta wrote:
> > Hello,
> >
> > I want to implement an automated system that generates dependency
> > information for my project's sources. I've used the standard technique:
> >
> > OBJS=a.o b.o ../../directory/c.o
> >
> > ...
> >
> > dep:
> > /bin/rm -f depend
> > for i in $(OBJS); do \
> > $(CPP) -MM $(CPPFLAGS) `echo $$i | sed "s/\(.*\)\\.o$$/\1.cpp/"` >>
> > depend;\ done
> >
> > ifeq (depend,$(wildcard depend))
> > include depend
> > endif
> >
> > The problem with this approach is that the following line:
> > g++ -MM ../../directory/c.cpp
> > outputs the following make rule:
> > c.o: ../../directory/c.cpp
> >
> > I would like it to output the rule as:
> > ../../directory/c.o: ../../directory/c.cpp
> >
> > Is there any way to do this with a g++ switch (I couldn't find one in the
> > manual), or do I have to write my own utility to perform that conversion?
> >
> > Thanks in advance.
> >
