The following changes since commit b311162c37a2867873e1222ce6b5f38c88be4d80: examples: add example and fiograph for protection information options (2023-08-16 09:34:46 -0400) are available in the Git repository at: git://git.kernel.dk/fio.git master for you to fetch changes up to 4a0c766c69ddfe5231d65f2676e97333ba89ab2b: Merge branch 'master' of https://github.com/michalbiesek/fio (2023-08-23 08:21:39 -0600) ---------------------------------------------------------------- Jens Axboe (1): Merge branch 'master' of https://github.com/michalbiesek/fio Michal Biesek (1): Add RISC-V 64 support arch/arch-riscv64.h | 32 ++++++++++++++++++++++++++++++++ arch/arch.h | 3 +++ configure | 24 +++++++++++++++++++++++- libfio.c | 1 + os/os-linux-syscall.h | 7 +++++++ 5 files changed, 66 insertions(+), 1 deletion(-) create mode 100644 arch/arch-riscv64.h --- Diff of recent changes: diff --git a/arch/arch-riscv64.h b/arch/arch-riscv64.h new file mode 100644 index 00000000..a74b7d47 --- /dev/null +++ b/arch/arch-riscv64.h @@ -0,0 +1,32 @@ +#ifndef ARCH_RISCV64_H +#define ARCH_RISCV64_H + +#include <unistd.h> +#include <stdlib.h> +#include <sys/types.h> +#include <sys/wait.h> + +#define FIO_ARCH (arch_riscv64) + +#define nop __asm__ __volatile__ ("nop") +#define read_barrier() __asm__ __volatile__("fence r, r": : :"memory") +#define write_barrier() __asm__ __volatile__("fence w, w": : :"memory") + +static inline unsigned long long get_cpu_clock(void) +{ + unsigned long val; + + asm volatile("rdcycle %0" : "=r"(val)); + return val; +} +#define ARCH_HAVE_CPU_CLOCK + +#define ARCH_HAVE_INIT +extern bool tsc_reliable; +static inline int arch_init(char *envp[]) +{ + tsc_reliable = true; + return 0; +} + +#endif diff --git a/arch/arch.h b/arch/arch.h index 6e476701..3ee9b053 100644 --- a/arch/arch.h +++ b/arch/arch.h @@ -24,6 +24,7 @@ enum { arch_mips, arch_aarch64, arch_loongarch64, + arch_riscv64, arch_generic, @@ -100,6 +101,8 @@ extern unsigned long arch_flags; #include "arch-aarch64.h" #elif defined(__loongarch64) #include "arch-loongarch64.h" +#elif defined(__riscv) && __riscv_xlen == 64 +#include "arch-riscv64.h" #else #warning "Unknown architecture, attempting to use generic model." #include "arch-generic.h" diff --git a/configure b/configure index 6c938251..36184a58 100755 --- a/configure +++ b/configure @@ -133,6 +133,20 @@ EOF compile_object } +check_val() { + cat > $TMPC <<EOF +#if $1 == $2 +int main(void) +{ + return 0; +} +#else +#error $1 is not equal $2 +#endif +EOF + compile_object +} + output_sym() { echo "$1=y" >> $config_host_mak echo "#define $1" >> $config_host_h @@ -501,13 +515,21 @@ elif check_define __hppa__ ; then cpu="hppa" elif check_define __loongarch64 ; then cpu="loongarch64" +elif check_define __riscv ; then + if check_val __riscv_xlen 32 ; then + cpu="riscv32" + elif check_val __riscv_xlen 64 ; then + cpu="riscv64" + elif check_val __riscv_xlen 128 ; then + cpu="riscv128" + fi else cpu=`uname -m` fi # Normalise host CPU name and set ARCH. case "$cpu" in - ia64|ppc|ppc64|s390|s390x|sparc64|loongarch64) + ia64|ppc|ppc64|s390|s390x|sparc64|loongarch64|riscv64) cpu="$cpu" ;; i386|i486|i586|i686|i86pc|BePC) diff --git a/libfio.c b/libfio.c index 5e3fd30b..237ce34c 100644 --- a/libfio.c +++ b/libfio.c @@ -75,6 +75,7 @@ static const char *fio_arch_strings[arch_nr] = { "mips", "aarch64", "loongarch64", + "riscv64", "generic" }; diff --git a/os/os-linux-syscall.h b/os/os-linux-syscall.h index 67ee4d91..626330ad 100644 --- a/os/os-linux-syscall.h +++ b/os/os-linux-syscall.h @@ -286,6 +286,13 @@ #define __NR_sys_tee 77 #define __NR_sys_vmsplice 75 #endif + +/* Linux syscalls for riscv64 */ +#elif defined(ARCH_RISCV64_H) +#ifndef __NR_ioprio_set +#define __NR_ioprio_set 30 +#define __NR_ioprio_get 31 +#endif #else #warning "Unknown architecture" #endif
