[Bug 474980] Review Request: ovm - Open Verification Methodology : IEEE 1800 SystemVerilog standard

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https://bugzilla.redhat.com/show_bug.cgi?id=474980


Chitlesh GOORAH <cgoorah@xxxxxxxxxxxx> changed:

           What    |Removed                     |Added
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         Depends on|                            |182235




--- Comment #1 from Chitlesh GOORAH <cgoorah@xxxxxxxxxxxx>  2008-12-06 05:50:28 EDT ---
Current, ovm can only be used with proprietary software. I am still searching a
way to find an opensource systemverilog simulator that supports ovm.

One short note:
Cadence and Mentor Graphics, the whole EDA leaders have developed and released
this ovm under the apache 2 license.

http://edageek.com/2008/12/04/systemverilog-synopsys/
http://edageek.com/2008/12/04/vmm-ovm-verification/
http://www.cadence.com/Community/blogs/fv/archive/2008/12/04/vmm-users-welcome-to-the-ovm.aspx

So, my only concern is whether fedora allows its inclusion or not.

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