Re: What CPU extensions can we assume are available by arch?

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On 4/25/20 12:24 UTC, Kevin Kofler wrote:
Richard Shaw wrote:
As far as LCPNet itself I've communicated with the primary developer quite
a bit over the last week. LPCNet *will not work* without optimizations (at
least not in real time which is the point).

Has anyone (upstream or elsewhere) ever looked into doing an SSE2 version of
the vector code?

Most of LPCNet computation is "embarrassingly parallel"; for each vector operation,
then each output element could be computed simultaneously.  So an SSE2 version
would be competitive with the AVX1 version (use the same instructions,
just don't VEX encode them) except for any advantage that AVX gains from
using 3-operand instructions instead of just 2-operand.

The existing code should be enhanced to align each 'float' array to a
cache-line boundary, and to place scalar members of 'struct's into any "holes".
Also, the existing code is single-threaded.  A two-threaded version
with one thread computing vector elements [0, 16*floor(N/32)) and a second
thread computing the rest, would be nearly twice as fast as long as
synchronization was fast [futex to the rescue.]  Two threads might trigger
thermal throttling on older CPUs.
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