[I'm hoping not to make too many announcements about this, but this is significant because I've finally reached a stage where other people can pitch in.] RISC-V is a new open processor architecture. The instruction set is patent free and freely implementable, and implementations are distributed under a BSD license. Wouldn't it be great to have open source all the way down to the transistors? https://riscv.org/ https://en.wikipedia.org/wiki/RISC-V There are some projects aiming to create RISC-V processors / development boards. I will point to a couple of the more promising ones: http://www.lowrisc.org/ https://www.sifive.com/ Fedora/RISC-V is a project to bootstrap Fedora on RISC-V. https://fedoraproject.org/wiki/Architectures/RISC-V The plan to bootstrap Fedora/RISC-V is outlined in the README file here (also attached to this email). http://git.annexia.org/?p=fedora-riscv.git;a=tree I have now reached Stage 4 in the bootstrapping process, which is significant because it means everyone can help to rebuild source RPMs for RISC-V. All you will need is: * Fedora 24 * fast x86_64 hardware * experience with C / compilers / architectures * time and patience, because our emulator is a bit slow :-( To take this further, please join the IRC channel: #fedora-riscv on FreeNode Read the README. git clone git://git.annexia.org/git/fedora-riscv.git Read the Makefile carefully and compare it to the README to understand the bootstrapping process. Enable copr and install the development packages: sudo dnf copr enable rjones/riscv sudo dnf install riscv-isa-sim riscv-qemu riscv-pk riscv-gnu-toolchain (These can also be built from source if you prefer.) You can either run the Makefile steps to try to build everything from source, or you can use the binary stage 3 disk image from: http://oirase.annexia.org/riscv/ Boot the disk image: make boot-stage3-in-spike And start using rpmbuild. At this point it's a good idea to chat with us on #fedora-riscv Thanks, Rich. -- Richard Jones, Virtualization Group, Red Hat http://people.redhat.com/~rjones Read my programming and virtualization blog: http://rwmj.wordpress.com libguestfs lets you edit virtual machines. Supports shell scripting, bindings from many languages. http://libguestfs.org
A plan for Fedora/RISC-V ---------------------------------------------------------------------- by Richard W.M. Jones (rjones@xxxxxxxxxx) Project home page: https://fedoraproject.org/wiki/Architectures/RISC-V The aim of the project ---------------------- Get Fedora running on the RISC-V architecture! This will just be an initial pass, which we're calling an "experimental architecture". It won't even be a secondary architecture for perhaps 1 to 3 years. About Fedora: https://getfedora.org/ About RISC-V: https://riscv.org/ https://en.wikipedia.org/wiki/RISC-V lowRISC: http://www.lowrisc.org/ SiFive: https://www.sifive.com/ How do we expect people to consume Fedora/RISC-V? ------------------------------------------------- Most users will download binaries. Of course source will be available for everything, buildable from source RPMS. Currently no hardware is available, so you either have to run RISC-V on an FPGA, or use emulation, either QEMU or Spike. For the FPGA option, you will need a Nexys 4 DDR development kit costing around US$341, plus an ordinary micro SD card (8+ GB), plus a host Fedora/x86-64 computer. - Maximum system RAM is 128 MB (1 GB is available if you use the other far more expensive FPGA development kit) - There is a 115200 bps 8n1 serial port. - There is no ethernet and no display. - Note that some parts of the FPGA toolchain are closed source. For the QEMU emulation option, you will need Fedora 24 (x86_64). - QEMU has unlimited system RAM. - Single virtual CPU. - We hope to get virtio-net and maybe virtio-scsi working. For the Spike emulation option, you will need Fedora 24 (x86_64). - Spike has unlimited system RAM. - Spike can emulate multiple virtual CPUs. - Spike's single thread performance is a bit slower than QEMU. - No network. What parts of Fedora are we aiming to build? -------------------------------------------- The @Core packages (as RPMs), rpmbuild, gcc, and a bootable binary disk image. Only 64 bit RISC-V ("riscv64") will be targeted. Once those are done, we can declare victory. What parts of Fedora are we *not* aiming to build? -------------------------------------------------- Nothing outside @Core except for specific compilers and build tools. Not Anaconda. Not Koji (at least, not at first). Not Grub nor EDK2. We will initially use the Berkeley bootloader (bbl), but aim for a standard bootloader later. Where will we build it? ----------------------- The packages which are run on the host (x86-64) computer are built in COPR (http://copr-fe.cloud.fedoraproject.org/coprs/rjones/riscv/). However the majority of packages will be built on RISC-V itself. Since there are no RISC-V builders, and we cannot provide any, initially developers will be building them on their own FPGAs / emulators and uploading them to somewhere central. Getting build infrastructure would be a more long-term aim. Bootstrapping stages -------------------- [This plan was loosely based on: https://fedoraproject.org/wiki/Architectures/AArch64/Bootstrap] Bootstrapping, Stage 1 ---------------------- (1a) riscv-qemu.x86_64: QEMU + RISC-V system emulation Not upstream, fork of qemu 2.5.0. https://github.com/riscv/riscv-qemu Status: done http://copr-fe.cloud.fedoraproject.org/coprs/rjones/riscv Note this package runs on x86-64 hosts, and is intended for people who want to run Fedora/RISC-V but who do not have FPGA/hardware. (1b) riscv-isa-sim.x86_64: Spike system emulator https://github.com/riscv/riscv-isa-sim Status: done http://copr-fe.cloud.fedoraproject.org/coprs/rjones/riscv (1c) Nexys4 DDR FPGA Various sources, see: http://www.lowrisc.org/docs/untether-v0.2/fpga-demo/ Bootstrapping, Stage 2 ---------------------- (2a) GNU cross-compiler toolchain. https://github.com/lowRISC/riscv-gnu-toolchain Status: done http://copr-fe.cloud.fedoraproject.org/coprs/rjones/riscv (2b) Berkley Bootloader (bbl) https://github.com/lowrisc/riscv-pk.git Status: done http://copr-fe.cloud.fedoraproject.org/coprs/rjones/riscv Used to boot the kernel and mount the root filesystem on FPGAs and QEMU. Bootstrapping, Stage 3 ---------------------- (3a) kernel.riscv64: The Linux kernel, cross-compiled. https://github.com/lowrisc/riscv-linux Not upstream fork of Linux 4.1. Status: done, see Makefile rule stage3-kernel/linux-*/vmlinux (3b) "Just enough userspace" We cross-compile packages from x86-64 host to riscv64 target filesystem. The aim is to have a filesystem (not RPMs) that can be booted on RISC-V hardware or under emulation, which will be sufficient to use to compile RPMs. Status: done, see Makefile rules stage3-chroot/* and http://oirase.annexia.org/riscv/ Bootstrapping, Stage 4 ---------------------- (4a) Userspace RPMs We will build RPMs using "rpmbuild" on RISC-V itself (under emulation). The usual command is: rpmbuild --rebuild blah-xyz.src.rpm --define 'debug_package %{nil}' We will build enough RPMs so that stage 4 can run rpmbuild, gcc. Essentially it's the same list of packages as for (3b) above, so look in the Makefile for "stage3-chroot/..." rules, plus any dependencies. Some packages require non-upstream patches for RISC-V. Hopefully only: kernel, glibc, binutils and gcc. Some packages require modifications to the spec file to reduce extraneous dependencies (eg. for generating documentation). noarch RPMs do not need to be rebuilt, they can be copied from Koji/x86. Status: ongoing, see stage3-prebuilt-rpms/* (4b) Recreate the filesystem from RPMs. Distribute an initial bootable binary disk image which is completely built from RPMs (but note: not created by Anaconda, we'll use "rpm --root"). (4c) kernel.riscv64: The Linux kernel, compiled as an RPM on RISC-V. (4d) Continue compiling all other RPMs from @Core. As more packages are compiled, distribute them as RPMs and distribute updated bootable binary disk image. (4e) Declare victory and celebrate! Open issues ----------- (none at present)
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