radeon DRM module, AMD A-6 APU, no signal recovery after DPMS Off (can be worked around)

[wdraxinger.maillist at draxit.de (Wolfgang Draxinger)]

On Sat, 15 Sep 2012 21:41:59 +0200
Wolfgang Draxinger <wdraxinger.maillist at draxit.de> wrote:

> (...)
>
> Summary problem description:
> AMD A-6 APU, with integrated Radeon core, Linux 3.5 radeon DRM/DRI2
> kernel module ? Video signal does not come back after DPMS state
> transistion into On state. Happens with X11 and the framebuffer
> console alike. Switching the video mode brings back the signal.

So I did a bit digging myself and although I'm not familiar with the
internal structure of the radeon driver I guess that the culprit is
probably found in those lines (and whatever is called through them)

linux-3.5.x/drivers/gpu/drm/atombios_crtc.c

 250 void atombios_crtc_dpms(struct drm_crtc *crtc, int mode)
 251 {
 252         struct drm_device *dev = crtc->dev;
 253         struct radeon_device *rdev = dev->dev_private;
 254         struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
 255 
 256         switch (mode) {
 257         case DRM_MODE_DPMS_ON:
 258                 radeon_crtc->enabled = true;
 259                 /* adjust pm to dpms changes BEFORE enabling crtcs */
 260                 radeon_pm_compute_clocks(rdev);
 261                 /* disable crtc pair power gating before programming */
 262                 if (ASIC_IS_DCE6(rdev) && !radeon_crtc->in_mode_set)
 263                         atombios_powergate_crtc(crtc, ATOM_DISABLE);
 264                 atombios_enable_crtc(crtc, ATOM_ENABLE);
 265                 if (ASIC_IS_DCE3(rdev) && !ASIC_IS_DCE6(rdev))
 266                         atombios_enable_crtc_memreq(crtc, ATOM_ENABLE);
 267                 atombios_blank_crtc(crtc, ATOM_DISABLE);
 268                 drm_vblank_post_modeset(dev, radeon_crtc->crtc_id);
 269                 radeon_crtc_load_lut(crtc);
 270                 break;
 271         case DRM_MODE_DPMS_STANDBY:
 272         case DRM_MODE_DPMS_SUSPEND:
 273         case DRM_MODE_DPMS_OFF:
 274                 drm_vblank_pre_modeset(dev, radeon_crtc->crtc_id);
 275                 if (radeon_crtc->enabled)
 276                         atombios_blank_crtc(crtc, ATOM_ENABLE);
 277                 if (ASIC_IS_DCE3(rdev) && !ASIC_IS_DCE6(rdev))
 278                         atombios_enable_crtc_memreq(crtc, ATOM_DISABLE);
 279                 atombios_enable_crtc(crtc, ATOM_DISABLE);
 280                 radeon_crtc->enabled = false;
 281                 /* power gating is per-pair */
 282                 if (ASIC_IS_DCE6(rdev) && !radeon_crtc->in_mode_set) {
 283                         struct drm_crtc *other_crtc;
 284                         struct radeon_crtc *other_radeon_crtc;
 285                         list_for_each_entry(other_crtc, &rdev->ddev->mode_config.crtc_list, head) {
 286                                 other_radeon_crtc = to_radeon_crtc(other_crtc);
 287                                 if (((radeon_crtc->crtc_id == 0) && (other_radeon_crtc->crtc_id == 1))      ||
 288                                     ((radeon_crtc->crtc_id == 1) && (other_radeon_crtc->crtc_id == 0))      ||
 289                                     ((radeon_crtc->crtc_id == 2) && (other_radeon_crtc->crtc_id == 3))      ||
 290                                     ((radeon_crtc->crtc_id == 3) && (other_radeon_crtc->crtc_id == 2))      ||
 291                                     ((radeon_crtc->crtc_id == 4) && (other_radeon_crtc->crtc_id == 5))      ||
 292                                     ((radeon_crtc->crtc_id == 5) && (other_radeon_crtc->crtc_id == 4))     ) {
 293                                         /* if both crtcs in the pair are off, enable power gating */
 294                                         if (other_radeon_crtc->enabled == false)
 295                                                 atombios_powergate_crtc(crtc, ATOM_ENABLE);
 296                                         break;
 297                                 }
 298                         }
 299                 }
 300                 /* adjust pm to dpms changes AFTER disabling crtcs */
 301                 radeon_pm_compute_clocks(rdev);
 302                 break;
 303         }
 304 }

What strikes me odd is the discrepancy between the power off and
power on sequences. When entering DPMS On mode (l. 262 et 263),
this happens without the pairing precautions done when powering off
for DPMS Standby, Suspend and Off (l. 282 ... 298)

Is that really correct?


Regards

Wolfgang