Comment # 10
on bug 93147
from Mario Kleiner
Created attachment 120301 [details] [review] First proposed patch to fix this on radeon-kms Ok, the attached patch works on my test systems with my timing tests and hardware timing measurement equipment and i think it hopefully avoids the races Ville and me could come up with so far. One thing which might make sense for improved efficiency is to replace the udelay(5) in the radeon_flip_work_func() with a usleep_range() that avoids polling and sleeps the right minimum amount of time. I'll try to try that today. For the line buffer sizes for < DCE4 i just guessed values which are hopefully big enough to cover earlier asics. I think too big is not a big problem for correctness, but potentially for performance under higher graphics load.
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