Hi Chris, [auto build test WARNING on drm/drm-next] [also build test WARNING on v4.4-rc1 next-20151118] [cannot apply to rockchip/for-next] url: https://github.com/0day-ci/linux/commits/Chris-Zhong/Add-mipi-dsi-support-for-rk3288/20151119-114228 base: git://people.freedesktop.org/~airlied/linux.git drm-next config: xtensa-allmodconfig (attached as .config) reproduce: wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # save the attached .config to linux build tree make.cross ARCH=xtensa All warnings (new ones prefixed by >>): In file included from arch/xtensa/include/generated/asm/div64.h:1:0, from include/linux/kernel.h:136, from include/linux/clk.h:16, from drivers/gpu/drm/bridge/dw_mipi_dsi.c:10: drivers/gpu/drm/bridge/dw_mipi_dsi.c: In function 'dw_mipi_dsi_get_hcomponent_lbcc': include/asm-generic/div64.h:43:28: warning: comparison of distinct pointer types lacks a cast (void)(((typeof((n)) *)0) == ((uint64_t *)0)); \ ^ >> drivers/gpu/drm/bridge/dw_mipi_dsi.c:819:9: note: in expansion of macro 'do_div' frac = do_div(lbcc, dsi->mode->clock); ^ drivers/gpu/drm/bridge/dw_mipi_dsi.c:819:2: warning: right shift count >= width of type frac = do_div(lbcc, dsi->mode->clock); ^ In file included from arch/xtensa/include/generated/asm/div64.h:1:0, from include/linux/kernel.h:136, from include/linux/clk.h:16, from drivers/gpu/drm/bridge/dw_mipi_dsi.c:10: include/asm-generic/div64.h:48:11: warning: passing argument 1 of '__div64_32' from incompatible pointer type __rem = __div64_32(&(n), __base); \ ^ >> drivers/gpu/drm/bridge/dw_mipi_dsi.c:819:9: note: in expansion of macro 'do_div' frac = do_div(lbcc, dsi->mode->clock); ^ include/asm-generic/div64.h:35:17: note: expected 'uint64_t *' but argument is of type 'u32 *' extern uint32_t __div64_32(uint64_t *dividend, uint32_t divisor); ^ vim +/do_div +819 drivers/gpu/drm/bridge/dw_mipi_dsi.c 803 static void dw_mipi_dsi_command_mode_config(struct dw_mipi_dsi *dsi) 804 { 805 dsi_write(dsi, DSI_TO_CNT_CFG, HSTX_TO_CNT(1000) | LPRX_TO_CNT(1000)); 806 dsi_write(dsi, DSI_BTA_TO_CNT, 0xd00); 807 dsi_write(dsi, DSI_CMD_MODE_CFG, CMD_MODE_ALL_LP); 808 dsi_write(dsi, DSI_MODE_CFG, ENABLE_CMD_MODE); 809 } 810 811 /* Get lane byte clock cycles. */ 812 static u32 dw_mipi_dsi_get_hcomponent_lbcc(struct dw_mipi_dsi *dsi, 813 u32 hcomponent) 814 { 815 u32 frac, lbcc; 816 817 lbcc = hcomponent * dsi->lane_mbps * MSEC_PER_SEC / 8; 818 > 819 frac = do_div(lbcc, dsi->mode->clock); 820 if (frac) 821 lbcc++; 822 823 return lbcc; 824 } 825 826 static void dw_mipi_dsi_line_timer_config(struct dw_mipi_dsi *dsi) 827 { --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation
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