[Bug 92214] Flightgear crashes during splashboot with R600 driver, LLVM 3.7.0 and mesa 11.0.2

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Comment # 33 on bug 92214 from
(In reply to Roland Scheidegger from comment #32)

> I believe the patch posted by Jose here,
> http://lists.freedesktop.org/archives/mesa-dev/2015-October/097948.html
> should help.
> 

I tested the patch posted by Jose, it doesn't solve the bug, the crash is still
here ( "illegal instruction" ),

we need to be sure that the "SSE4" argument is not passed to the llvm compiler
by mesa if the CPU doesn't support SSE4,

for llvm 3.7.0 my cpu name is "penryn" and it seems that SSE4 is enabled by
default for penryn cpu in llvm default settings,

that's why a check must be done by mesa in order to avoid this crash ( illegal
opcode cpu ) when a pentium dual core is used, the SSE4 argument should not be
passed to the llvm compiler if the CPU doesn't support it,

I don't know exactly what is wrong in mesa source code, if the check related to
SSE4 is really done and if mesa tries to pass to llvm the good cpu features
arguments ( SSEx, MMX, AVX... ),

for now the workaround I found is to patch LLVM 3.7.0 in order to re-add the
"SSE4 test", my CPU name will be after this patch : "core2", which was the
default behaviour in previous versions of LLVM ( like 3.6.2 version ) :

--- a/lib/Support/Host.cpp    2015-10-14 07:13:52.381374679 +0200
+++ b/lib/Support/Host.cpp   2015-10-14 07:13:28.224708323 +0200
@@ -332,6 +332,8 @@
                // 17h. All processors are manufactured using the 45 nm
process.
                //
                // 45nm: Penryn , Wolfdale, Yorkfield (XE)
+        // Not all Penryn processors support SSE 4.1 (such as the Pentium
brand)
+        return HasSSE41 ? "penryn" : "core2";          
       case 29: // Intel Xeon processor MP. All processors are manufactured
using
                // the 45 nm process.
         return "penryn";


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