On Tue, 29 Sep 2015, Rafael Antognolli <rafael.antognolli@xxxxxxxxx> wrote:
> This new test makes some basic testing on the proposed drm_dp_aux_dev
> interface. If the feature is enabled and the drm_dp_aux_dev class is
> present, it will check for available DP aux channels and test them for:
> - basic seek to 0 and read 1 byte
> - seek to the last address and read, to confirm 0 is returned
> - seek one more byte and confirm that EINVAL is returned
> - try to read 64 bytes when at 8 bytes from the end of the
> address space
> - try to read 64 bytes at the address 0.
>
> So far, no write checks are done.
Side note, it would be useful to have a tool under tools/ to
read/write/dump DPCD registers.
On the one hand, I think it would be trivial to bolt this into the
intel_reg tool. One could add a dpcd "port" (kind of like namespace) and
all of it would work very nicely. Everything is there already.
On the other hand, this perhaps should be a standalone tool, as it's
driver agnostic stuff. But it would mean quite a bit of code
duplication, and we might end up with the mess we had before intel_reg -
lots of tools for various things with slightly different feature sets,
yet all of them doing roughly the same thing.
BR,
Jani.
>
> Signed-off-by: Rafael Antognolli <rafael.antognolli@xxxxxxxxx>
> ---
> tests/.gitignore | 1 +
> tests/Makefile.sources | 1 +
> tests/kms_dp_aux_dev.c | 134 +++++++++++++++++++++++++++++++++++++++++++++++++
> 3 files changed, 136 insertions(+)
> create mode 100644 tests/kms_dp_aux_dev.c
>
> diff --git a/tests/.gitignore b/tests/.gitignore
> index dc8bb53..efdad75 100644
> --- a/tests/.gitignore
> +++ b/tests/.gitignore
> @@ -127,6 +127,7 @@ kms_3d
> kms_addfb_basic
> kms_crtc_background_color
> kms_cursor_crc
> +kms_dp_aux_dev
> kms_draw_crc
> kms_fbc_crc
> kms_fbcon_fbt
> diff --git a/tests/Makefile.sources b/tests/Makefile.sources
> index 2e2e088..dc07737 100644
> --- a/tests/Makefile.sources
> +++ b/tests/Makefile.sources
> @@ -64,6 +64,7 @@ TESTS_progs_M = \
> gem_write_read_ring_switch \
> kms_addfb_basic \
> kms_cursor_crc \
> + kms_dp_aux_dev \
> kms_draw_crc \
> kms_fbc_crc \
> kms_fbcon_fbt \
> diff --git a/tests/kms_dp_aux_dev.c b/tests/kms_dp_aux_dev.c
> new file mode 100644
> index 0000000..aab8c95
> --- /dev/null
> +++ b/tests/kms_dp_aux_dev.c
> @@ -0,0 +1,134 @@
> +/*
> + * Copyright © 2015 Intel Corporation
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice (including the next
> + * paragraph) shall be included in all copies or substantial portions of the
> + * Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
> + * IN THE SOFTWARE.
> + */
> +
> +/** @file kms_dp_aux_dev.c
> + *
> + * This is a test of functionality of drm_dp_aux_dev.
> + */
> +
> +#include "igt.h"
> +#include <stdlib.h>
> +#include <stdio.h>
> +#include <dirent.h>
> +#include <unistd.h>
> +#include <sys/stat.h>
> +#include <fcntl.h>
> +
> +#include <drm.h>
> +
> +#define DRM_DP_AUX_SYSFS_PATH "/sys/class/drm_dp_aux_dev"
> +
> +IGT_TEST_DESCRIPTION("Test of drm_aux_dev nodes.");
> +
> +static void drm_dp_aux_test(const char *devname)
> +{
> + char basedir[] = "/dev/";
> + char name[256 + sizeof(basedir)];
> + off_t address;
> + uint8_t buf;
> + uint8_t bigbuf[64];
> + int fd;
> +
> + ssize_t res;
> +
> + snprintf(name, sizeof(name), "%s%s", basedir, devname);
> + igt_info("Running test on %s\n", name);
> +
> + /* Check if this DP aux channel is connected before continuing tests */
> + fd = open(name, O_RDONLY);
> + igt_assert_lte(0, fd);
> + address = lseek(fd, 0x0, SEEK_SET);
> + igt_assert_eq(address, 0x0);
> + res = read(fd, &buf, sizeof(buf));
> + igt_skip_on(res < 0 && errno == ETIMEDOUT);
> +
> +
> + /* Channel is connected, start tests */
> + igt_assert_eq(res, sizeof(buf));
> +
> + /* Test reads on the end of address space */
> + address = lseek(fd, 0, SEEK_END);
> + igt_assert_eq(address, 1 << 20);
> + res = read(fd, &buf, sizeof(buf));
> + igt_assert_eq(res, 0);
> +
> + address = lseek(fd, 1, SEEK_CUR);
> + igt_assert_eq(address, -1);
> + igt_assert_eq(errno, EINVAL);
> +
> + address = lseek(fd, -8, SEEK_END);
> + res = read(fd, bigbuf, sizeof(bigbuf));
> + igt_assert_eq(res, 8);
> +
> + /* Test reading more than 16 bytes at once */
> + address = lseek(fd, 0, SEEK_SET);
> + res = read(fd, bigbuf, sizeof(bigbuf));
> + igt_assert_eq(res, sizeof(bigbuf));
> +}
> +
> +static void for_each_dp_aux(DIR *dir)
> +{
> + int count = 0;
> + struct dirent *dirent;
> +
> + if (!dir)
> + return;
> +
> + rewinddir(dir);
> + while ((dirent = readdir(dir))) {
> + if (dirent->d_name[0] == '.')
> + continue;
> +
> + count++;
> + igt_subtest(dirent->d_name)
> + drm_dp_aux_test(dirent->d_name);
> + }
> +
> + closedir(dir);
> +}
> +
> +igt_main
> +{
> + struct stat st;
> + DIR *dir = NULL;
> +
> + igt_fixture {
> + int count = 0;
> + struct dirent *dirent;
> +
> + igt_require(stat(DRM_DP_AUX_SYSFS_PATH, &st) == 0);
> + igt_require(S_ISDIR(st.st_mode));
> +
> + dir = opendir(DRM_DP_AUX_SYSFS_PATH);
> + igt_require(dir);
> +
> + while ((dirent = readdir(dir))) {
> + if (dirent->d_name[0] != '.')
> + count++;
> + }
> +
> + igt_require(count > 0);
> + }
> +
> + for_each_dp_aux(dir);
> +}
> --
> 2.4.3
>
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--
Jani Nikula, Intel Open Source Technology Center
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