Hi Werner, Thanks for sharing this. The DPHY timings in downstream dtsi are exactly the same as the excel calculation, but slightly different from the output of drm code as you posted. (e.g hs_zero is 116 vs 118) I think it is caused by some precision loss during driver calculation, but I need to double check. Could you help to try configuring the same DPHY timings as downstream, but leave the values in DSIPHY_LNx_CFG4 as is, to see if it works? This could help us to narrow down the issue. Thanks, Hai -----Original Message----- From: Werner Johansson [mailto:werner.johansson@xxxxxxxxx] Sent: Monday, August 24, 2015 9:24 PM To: Hai Li Cc: Rob Clark; Johansson, Werner; dri-devel@xxxxxxxxxxxxxxxxxxxxx Subject: Re: drm/msm/dsi: hs_zero timing On Mon, Aug 24, 2015 at 7:32 AM, Hai Li <hali@xxxxxxxxxxxxxx> wrote: > Hi Werner, > > Yes, the register is to adjust hs_zero. > Could you share the panel's video timing and dphy timings (or the panel DT), used by downstream driver? > > The dphy timing calculations in the phy driver are from the excel sheet as well, I can check if there is any issue inside the calculation code making the difference. > > > Thanks, > Hai Hi Hai, Yes definitely, our downstream DT definitions for the Panasonic panel looks like this: (taken from our kernel available here: https://github.com/sonyxperiadev/kernel-copyleft/blob/23.1.A.1.xxx/arch/arm/boot/dts/dsi-panel-castor.dtsi#L78-L145) dsi_novatek_panasonic_wuxga_vid: somc,novatek_panasonic_wuxga_panel { qcom,mdss-dsi-panel-name = "panasonic novatek wuxga video"; qcom,mdss-dsi-panel-controller = <&mdss_dsi0>; qcom,mdss-dsi-panel-type = "dsi_video_mode"; qcom,mdss-dsi-panel-destination = "display_1"; qcom,mdss-dsi-panel-framerate = <60>; qcom,mdss-dsi-virtual-channel-id = <0>; qcom,mdss-dsi-stream = <0>; qcom,mdss-dsi-panel-width = <1920>; qcom,mdss-dsi-panel-height = <1200>; qcom,mdss-dsi-h-front-porch = <152>; qcom,mdss-dsi-h-back-porch = <20>; qcom,mdss-dsi-h-pulse-width = <52>; qcom,mdss-dsi-h-sync-skew = <0>; qcom,mdss-dsi-v-back-porch = <48>; qcom,mdss-dsi-v-front-porch = <24>; qcom,mdss-dsi-v-pulse-width = <6>; qcom,mdss-dsi-h-left-border = <0>; qcom,mdss-dsi-h-right-border = <0>; qcom,mdss-dsi-v-top-border = <0>; qcom,mdss-dsi-v-bottom-border = <0>; qcom,mdss-dsi-bpp = <24>; qcom,mdss-dsi-underflow-color = <0x0>; qcom,mdss-dsi-border-color = <0>; qcom,mdss-dsi-on-command = [32 01 00 00 00 00 02 00 00]; qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; qcom,mdss-dsi-h-sync-pulse = <1>; qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; qcom,mdss-dsi-bllp-eof-power-mode; qcom,mdss-dsi-bllp-power-mode; qcom,mdss-dsi-lane-0-state; qcom,mdss-dsi-lane-1-state; qcom,mdss-dsi-lane-2-state; qcom,mdss-dsi-lane-3-state; qcom,mdss-dsi-panel-timings = [FB 3E 2A 00 70 74 2E 42 33 03 04 00]; qcom,mdss-dsi-t-clk-post = <0x02>; qcom,mdss-dsi-t-clk-pre = <0x2E>; qcom,mdss-dsi-bl-min-level = <1>; qcom,mdss-dsi-bl-max-level = <255>; qcom,mdss-brightness-max-level = <255>; qcom,mdss-dsi-dma-trigger = "trigger_sw"; qcom,mdss-dsi-mdp-trigger = "none"; qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; qcom,mdss-dsi-pan-enable-dynamic-fps; qcom,mdss-dsi-pan-fps-update = "dfps_suspend_resume_mode"; qcom,cont-splash-enabled; qcom,mdss-dsi-tx-eot-append; somc,driver-ic = <3>; somc,dric-gpio = <&msmgpio 26 0>; somc,mul-channel-scaling = <3>; somc,mdss-phy-size-mm = <217 135>; somc,mdss-dsi-lane-config = [00 c2 ef 00 00 00 00 01 ff 00 c2 ef 00 00 00 00 01 ff 00 c2 ef 00 00 00 00 01 ff 00 c2 ef 00 00 00 00 01 ff 00 02 00 00 00 00 00 01 97]; somc,lcd-id = <1>; somc,lcd-id-adc = <801000 917000>; somc,disp-en-on-post = <251>; somc,disp-en-off-pre = <86>; somc,pw-down-period = <500>; somc,mdss-dsi-uv-param-type = <0>; somc,mdss-dsi-pcc-table-size = <1>; somc,mdss-dsi-pcc-table = < 0x00 0x01 0x1C 0x1F 0x1C 0x1F 0x8000 0x8000 0x7D80>; }; /wj _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/dri-devel
