On 08/24/2015 10:16 PM, Rob Clark wrote:
On Mon, Aug 24, 2015 at 4:20 PM, Samuel Pitoiset
<samuel.pitoiset@xxxxxxxxx> wrote:
Hi Hai,
I don't know what those bits are used for, but I'm a bit curious about how
did you find them?
Also, the next time don't forget to send patches related to envytools to
nouveau@xxxxxxxxxxxxxxxxxxxxx
(or better send a pull request from github).
fwiw, those are actually for freedreno envytools ;-)
Oh really? I have never heard about an envytools for freedreno! :)
(although I suppose at some point we should maybe try to get it all
back into a single repo..)
BR,
-R
Thanks.
On 08/13/2015 11:44 PM, Hai Li wrote:
More registers and bit fields are added for PHY timings
and bitclk source selection.
Signed-off-by: Hai Li <hali@xxxxxxxxxxxxxx>
---
rnndb/dsi/dsi.xml | 11 +++++++++--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/rnndb/dsi/dsi.xml b/rnndb/dsi/dsi.xml
index 02cfa3b..956f3ff 100644
--- a/rnndb/dsi/dsi.xml
+++ b/rnndb/dsi/dsi.xml
@@ -217,6 +217,9 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/
rules-ng.xsd">
<reg32 offset="0x00128" name="PHY_RESET">
<bitfield name="RESET" pos="0" type="boolean"/>
</reg32>
+ <reg32 offset="0x0017c" name="T_CLK_PRE_EXTEND">
+ <bitfield name="INC_BY_2_BYTECLK" pos="0" type="boolean"/>
+ </reg32>
<reg32 offset="0x001d0" name="RDBK_DATA_CTRL">
<bitfield name="COUNT" low="16" high="23" type="uint"/>
<bitfield name="CLR" pos="0" type="boolean"/>
@@ -437,7 +440,9 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/
rules-ng.xsd">
<reg32 offset="0x001c4" name="BIST_CTRL_4"/>
<reg32 offset="0x001c8" name="BIST_CTRL_5"/>
- <reg32 offset="0x001d4" name="GLBL_TEST_CTRL"/>
+ <reg32 offset="0x001d4" name="GLBL_TEST_CTRL">
+ <bitfield name="BITCLK_HS_SEL" pos="0" type="boolean"/>
+ </reg32>
<reg32 offset="0x001dc" name="LDO_CNTRL"/>
</domain>
@@ -608,7 +613,9 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/
rules-ng.xsd">
<reg32 offset="0x001c4" name="BIST_CTRL_4"/>
<reg32 offset="0x001c8" name="BIST_CTRL_5"/>
- <reg32 offset="0x001d4" name="GLBL_TEST_CTRL"/>
+ <reg32 offset="0x001d4" name="GLBL_TEST_CTRL">
+ <bitfield name="BITCLK_HS_SEL" pos="0" type="boolean"/>
+ </reg32>
<reg32 offset="0x001dc" name="LDO_CNTRL"/>
</domain>
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