From: Maruthi Srinivas Bayyavarapu <Maruthi.Bayyavarapu@xxxxxxx>
There are 48 SRAM memory banks in ACP 2.1. Use bank index - 0 for
DMA descriptors 1 to 4 for playback, 5 to 8 for capture.
Signed-off-by: Maruthi Bayyavarapu <maruthi.bayyavarapu@xxxxxxx>
Reviewed-by: Murali Krishna Vemuri <murali-krishna.vemuri@xxxxxxx>
Acked-by: Alex Deucher <alexander.deucher@xxxxxxx>
---
drivers/gpu/drm/amd/acp/acp_hw.c | 10 +++++-----
drivers/gpu/drm/amd/acp/acp_hw.h | 4 ++--
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/amd/acp/acp_hw.c b/drivers/gpu/drm/amd/acp/acp_hw.c
index 830a7da..be364ab 100644
--- a/drivers/gpu/drm/amd/acp/acp_hw.c
+++ b/drivers/gpu/drm/amd/acp/acp_hw.c
@@ -150,7 +150,7 @@ static void set_acp_sysmem_dma_descriptors(struct amd_acp_device *acp_dev,
dmadscr[0].size_xfer_dir.val = (u32) 0x0;
if (direction == STREAM_PLAYBACK) {
dma_dscr_idx = PLAYBACK_START_DMA_DESCR_CH12;
- dmadscr[0].dest = ACP_SHARED_RAM_BANK_38_ADDRESS + (size / 2);
+ dmadscr[0].dest = ACP_SHARED_RAM_BANK_1_ADDRESS + (size / 2);
dmadscr[0].src = ACP_INTERNAL_APERTURE_WINDOW_0_ADDRESS +
(pte_offset * PAGE_SIZE_4K);
dmadscr[0].size_xfer_dir.s.trans_direction =
@@ -159,7 +159,7 @@ static void set_acp_sysmem_dma_descriptors(struct amd_acp_device *acp_dev,
dmadscr[0].size_xfer_dir.s.ioc = (u32) 0x0;
} else {
dma_dscr_idx = CAPTURE_START_DMA_DESCR_CH14;
- dmadscr[0].src = ACP_SHARED_RAM_BANK_47_ADDRESS;
+ dmadscr[0].src = ACP_SHARED_RAM_BANK_5_ADDRESS;
dmadscr[0].dest = ACP_INTERNAL_APERTURE_WINDOW_0_ADDRESS +
(pte_offset * PAGE_SIZE_4K);
dmadscr[0].size_xfer_dir.s.trans_direction =
@@ -173,7 +173,7 @@ static void set_acp_sysmem_dma_descriptors(struct amd_acp_device *acp_dev,
dmadscr[1].size_xfer_dir.val = (u32) 0x0;
if (direction == STREAM_PLAYBACK) {
dma_dscr_idx = PLAYBACK_END_DMA_DESCR_CH12;
- dmadscr[1].dest = ACP_SHARED_RAM_BANK_38_ADDRESS;
+ dmadscr[1].dest = ACP_SHARED_RAM_BANK_1_ADDRESS;
dmadscr[1].src = ACP_INTERNAL_APERTURE_WINDOW_0_ADDRESS +
(pte_offset * PAGE_SIZE_4K) + (size / 2);
dmadscr[1].size_xfer_dir.s.trans_direction =
@@ -224,13 +224,13 @@ static void set_acp_to_i2s_dma_descriptors(struct amd_acp_device *acp_dev,
dmadscr[0].size_xfer_dir.val = (u32) 0x0;
if (direction == STREAM_PLAYBACK) {
dma_dscr_idx = PLAYBACK_START_DMA_DESCR_CH13;
- dmadscr[0].src = ACP_SHARED_RAM_BANK_38_ADDRESS;
+ dmadscr[0].src = ACP_SHARED_RAM_BANK_1_ADDRESS;
dmadscr[0].size_xfer_dir.s.trans_direction = TO_ACP_I2S_1;
dmadscr[0].size_xfer_dir.s.size = (size / 2);
dmadscr[0].size_xfer_dir.s.ioc = (u32) 0x1;
} else {
dma_dscr_idx = CAPTURE_START_DMA_DESCR_CH15;
- dmadscr[0].dest = ACP_SHARED_RAM_BANK_47_ADDRESS;
+ dmadscr[0].dest = ACP_SHARED_RAM_BANK_5_ADDRESS;
dmadscr[0].size_xfer_dir.s.trans_direction = FROM_ACP_I2S_1;
dmadscr[0].size_xfer_dir.s.size = (size / 2);
dmadscr[0].size_xfer_dir.s.ioc = (u32) 0x1;
diff --git a/drivers/gpu/drm/amd/acp/acp_hw.h b/drivers/gpu/drm/amd/acp/acp_hw.h
index 4aa6b1c..b58349c 100644
--- a/drivers/gpu/drm/amd/acp/acp_hw.h
+++ b/drivers/gpu/drm/amd/acp/acp_hw.h
@@ -19,10 +19,10 @@
#define ACP_PHYSICAL_BASE 0x14000
/* Playback SRAM address (as a destination in dma descriptor) */
-#define ACP_SHARED_RAM_BANK_38_ADDRESS 0x404A000
+#define ACP_SHARED_RAM_BANK_1_ADDRESS 0x4002000
/* Capture SRAM address (as a source in dma descriptor) */
-#define ACP_SHARED_RAM_BANK_47_ADDRESS 0x4054000
+#define ACP_SHARED_RAM_BANK_5_ADDRESS 0x400A000
#define ACP_DMA_RESET_TIME 10000
#define ACP_CLOCK_EN_TIME_OUT_VALUE 0x000000FF
--
1.8.3.1
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