[PATCH 05/12] drm/i915: Load color capabilities for CHV CRTC

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As per Color Manager design, each driver is responsible to load its
color correction and enhancement capabilities in the form of a DRM blob
property, so that user space can query and read.

This patch loads all CHV platform specific color capabilities for CRTC
into a blob that can be accessible by user space to
query capabilities via DRM property interface.

CRTC properties added in this patch for CHV are:
1. DeGamma (Palette correction before CTM)
2. Gamma (Palette correction after CTM)
3. CSC (CTM)

Signed-off-by: Shashank Sharma <shashank.sharma@xxxxxxxxx>
Signed-off-by: Kausal Malladi <Kausal.Malladi@xxxxxxxxx>
---
 drivers/gpu/drm/i915/intel_color_manager.c | 95 ++++++++++++++++++++++++++++++
 drivers/gpu/drm/i915/intel_color_manager.h | 20 +++++++
 2 files changed, 115 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_color_manager.c b/drivers/gpu/drm/i915/intel_color_manager.c
index 9280ea6..71b4c05 100644
--- a/drivers/gpu/drm/i915/intel_color_manager.c
+++ b/drivers/gpu/drm/i915/intel_color_manager.c
@@ -27,18 +27,113 @@
 
 #include "intel_color_manager.h"
 
+int get_chv_pipe_capabilities(struct drm_device *dev,
+		struct drm_color_caps *color_caps, struct drm_crtc *crtc)
+{
+	struct drm_palette_caps palette_caps_after_ctm;
+	struct drm_palette_caps palette_caps_before_ctm;
+	struct drm_palette_sampling_details
+		palette_sampling_before_ctm[CHV_MAX_PALETTE_CAPS_BEFORE_CTM];
+	struct drm_palette_sampling_details
+		palette_sampling_after_ctm[CHV_MAX_PALETTE_CAPS_AFTER_CTM];
+	struct drm_ctm_caps ctm_caps;
+	struct drm_property_blob *blob = NULL;
+	struct drm_mode_config *config = &dev->mode_config;
+	int ret;
+
+	palette_sampling_before_ctm[0].sample_fract_precision =
+		CHV_DEGAMMA_PRECISION;
+	palette_sampling_before_ctm[0].last_sample_int_max =
+		CHV_DEGAMMA_LAST_SAMPLE_INT_MAX;
+	palette_sampling_before_ctm[0].remaining_sample_int_max =
+		CHV_DEGAMMA_SAMPLE_INT_MAX;
+	palette_sampling_before_ctm[0].num_samples =
+		CHV_DEGAMMA_MAX_VALS;
+
+	palette_caps_before_ctm.version = CHV_PALETTE_STRUCT_VERSION;
+	palette_caps_before_ctm.num_supported_types =
+		CHV_MAX_PALETTE_CAPS_BEFORE_CTM;
+	palette_caps_before_ctm.palette_sampling_types[0] =
+		palette_sampling_before_ctm[0];
+
+	palette_sampling_after_ctm[0].sample_fract_precision =
+		CHV_10BIT_GAMMA_PRECISION;
+	palette_sampling_after_ctm[0].last_sample_int_max =
+		CHV_GAMMA_LAST_SAMPLE_INT_MAX;
+	palette_sampling_after_ctm[0].remaining_sample_int_max =
+		CHV_GAMMA_SAMPLE_INT_MAX;
+	palette_sampling_after_ctm[0].num_samples =
+		CHV_10BIT_GAMMA_MAX_VALS;
+
+	palette_sampling_after_ctm[1].sample_fract_precision =
+		CHV_8BIT_GAMMA_PRECISION;
+	palette_sampling_after_ctm[1].last_sample_int_max =
+		CHV_GAMMA_LAST_SAMPLE_INT_MAX;
+	palette_sampling_after_ctm[1].remaining_sample_int_max =
+		CHV_GAMMA_SAMPLE_INT_MAX;
+	palette_sampling_after_ctm[1].num_samples =
+		CHV_8BIT_GAMMA_MAX_VALS;
+
+	palette_caps_after_ctm.version = CHV_PALETTE_STRUCT_VERSION;
+	palette_caps_after_ctm.num_supported_types =
+		CHV_MAX_PALETTE_CAPS_AFTER_CTM;
+	palette_caps_after_ctm.palette_sampling_types[0] =
+		palette_sampling_after_ctm[0];
+	palette_caps_after_ctm.palette_sampling_types[1] =
+		palette_sampling_after_ctm[1];
+
+	ctm_caps.version = CHV_CTM_STRUCT_VERSION;
+	ctm_caps.ctm_coeff_fract_precision = CHV_CSC_COEFF_MAX_PRECISION;
+	ctm_caps.ctm_coeff_int_max = CHV_CSC_COEFF_MAX_INT;
+	ctm_caps.ctm_coeff_int_min = CHV_CSC_COEFF_MIN_INT;
+
+	color_caps->version = CHV_PLATFORM_STRUCT_VERSION;
+	color_caps->palette_caps_after_ctm = palette_caps_after_ctm;
+	color_caps->palette_caps_before_ctm = palette_caps_before_ctm;
+	color_caps->ctm_caps = ctm_caps;
+
+	ret = drm_property_replace_global_blob(dev, &blob,
+			sizeof(struct drm_color_caps),
+			(const void *)color_caps,
+			&crtc->base, config->prop_color_capabilities);
+	if (ret) {
+		DRM_ERROR("Error updating Gamma blob\n");
+		return -EFAULT;
+	}
+
+	return 0;
+}
+
+int get_pipe_capabilities(struct drm_device *dev,
+		struct drm_color_caps *color_caps, struct drm_crtc *crtc)
+{
+	if (IS_CHERRYVIEW(dev))
+		return get_chv_pipe_capabilities(dev, color_caps, crtc);
+	return -EINVAL;
+}
+
 void intel_color_manager_attach(struct drm_device *dev,
 		struct drm_mode_object *mode_obj)
 {
 	struct drm_mode_config *config = &dev->mode_config;
+	struct drm_color_caps *color_caps;
+	struct drm_crtc *crtc;
+	int ret;
 
 	if (mode_obj->type == DRM_MODE_OBJECT_CRTC) {
+		crtc = obj_to_crtc(mode_obj);
 		if (config->prop_color_capabilities) {
 			drm_object_attach_property(mode_obj,
 					config->prop_color_capabilities, 0);
 			DRM_DEBUG_DRIVER("Attached Color Caps property to CRTC\n");
 		} else
 			DRM_ERROR("Error attaching Color Capabilities property to CRTC\n");
+
+		color_caps = kzalloc(sizeof(struct drm_color_caps), GFP_KERNEL);
+		ret = get_pipe_capabilities(dev, color_caps, crtc);
+		if (ret)
+			DRM_ERROR("Error getting CRTC capabilities for platform\n");
+
 		if (config->prop_palette_before_ctm) {
 			drm_object_attach_property(mode_obj,
 					config->prop_palette_before_ctm, 0);
diff --git a/drivers/gpu/drm/i915/intel_color_manager.h b/drivers/gpu/drm/i915/intel_color_manager.h
index c564761..32262ac 100644
--- a/drivers/gpu/drm/i915/intel_color_manager.h
+++ b/drivers/gpu/drm/i915/intel_color_manager.h
@@ -26,3 +26,23 @@
  */
 #include <drm/drmP.h>
 #include <drm/drm_crtc_helper.h>
+#include "i915_drv.h"
+
+#define CHV_PALETTE_STRUCT_VERSION		1
+#define CHV_CTM_STRUCT_VERSION			1
+#define CHV_PLATFORM_STRUCT_VERSION		1
+#define CHV_MAX_PALETTE_CAPS_BEFORE_CTM		1
+#define CHV_MAX_PALETTE_CAPS_AFTER_CTM		2
+#define CHV_DEGAMMA_PRECISION			14
+#define CHV_DEGAMMA_LAST_SAMPLE_INT_MAX		0
+#define CHV_DEGAMMA_SAMPLE_INT_MAX		0
+#define CHV_DEGAMMA_MAX_VALS			65
+#define CHV_10BIT_GAMMA_PRECISION		10
+#define CHV_GAMMA_LAST_SAMPLE_INT_MAX		0
+#define CHV_GAMMA_SAMPLE_INT_MAX		0
+#define CHV_10BIT_GAMMA_MAX_VALS		257
+#define CHV_8BIT_GAMMA_PRECISION		8
+#define CHV_8BIT_GAMMA_MAX_VALS			256
+#define CHV_CSC_COEFF_MAX_PRECISION		12
+#define CHV_CSC_COEFF_MAX_INT			7
+#define CHV_CSC_COEFF_MIN_INT			-7
-- 
2.4.5

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