On Wed, May 20, 2015 at 11:32 AM, Daniel Vetter <daniel@xxxxxxxx> wrote:
> On Wed, May 20, 2015 at 11:15:27AM -0400, Rob Clark wrote:
>> Using fb modifier flag, support NV12MT format in MDP4.
>>
>> v2:
>> - rework the modifier's description [Daniel Vetter's comment]
>> - drop .set_mode_config() callback [Rob Clark's comment]
>> v3:
>> - change VENDOR's name and restrict usage to NV12 [pointed by Daniel]
>>
>> Signed-off-by: Rob Clark <robdclark@xxxxxxxxx>
>> ---
>> drivers/gpu/drm/drm_crtc.c | 14 ++++++++++++++
>> drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c | 2 ++
>> drivers/gpu/drm/msm/mdp/mdp4/mdp4_plane.c | 22 ++++++++++++++++++++++
>> include/uapi/drm/drm_fourcc.h | 15 +++++++++++++++
>> 4 files changed, 53 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
>> index 3007b44..ed5d3f9 100644
>> --- a/drivers/gpu/drm/drm_crtc.c
>> +++ b/drivers/gpu/drm/drm_crtc.c
>> @@ -3304,6 +3304,20 @@ static int framebuffer_check(const struct drm_mode_fb_cmd2 *r)
>> r->modifier[i], i);
>> return -EINVAL;
>> }
>> +
>> + /* modifier specific checks: */
>> + switch (r->modifier[i]) {
>> + case DRM_FORMAT_MOD_SAMSUNG_64_32_TILE:
>> + if (r->pixel_format != DRM_FORMAT_NV12 ||
>> + width % 128 || height % 32) {
>> + DRM_DEBUG_KMS("bad modifier data for plane %d\n", i);
>> + return -EINVAL;
>> + }
>
> Should we also check that the stride matches the macroblock size? lgtm
> otherwise.
I don't believe we have any restriction on stride.. although I can add
a check for multiple of 128 now and revisit when some other driver(s)
support the format. Probably better to relax restrictions later,
rather than other way around.
BR,
-R
> -Daniel
>
>> + break;
>> +
>> + default:
>> + break;
>> + }
>> }
>>
>> return 0;
>> diff --git a/drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c b/drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c
>> index d847b94..88a75cb 100644
>> --- a/drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c
>> +++ b/drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c
>> @@ -119,6 +119,8 @@ static int mdp4_hw_init(struct msm_kms *kms)
>> if (mdp4_kms->rev > 1)
>> mdp4_write(mdp4_kms, REG_MDP4_RESET_STATUS, 1);
>>
>> + dev->mode_config.allow_fb_modifiers = true;
>> +
>> out:
>> pm_runtime_put_sync(dev->dev);
>>
>> diff --git a/drivers/gpu/drm/msm/mdp/mdp4/mdp4_plane.c b/drivers/gpu/drm/msm/mdp/mdp4/mdp4_plane.c
>> index dbc0689..0d1dbb7 100644
>> --- a/drivers/gpu/drm/msm/mdp/mdp4/mdp4_plane.c
>> +++ b/drivers/gpu/drm/msm/mdp/mdp4/mdp4_plane.c
>> @@ -33,6 +33,21 @@ struct mdp4_plane {
>> };
>> #define to_mdp4_plane(x) container_of(x, struct mdp4_plane, base)
>>
>> +/* MDP format helper functions */
>> +static inline
>> +enum mdp4_frame_format mdp4_get_frame_format(struct drm_framebuffer *fb)
>> +{
>> + bool is_tile = false;
>> +
>> + if (fb->modifier[1] == DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
>> + is_tile = true;
>> +
>> + if (fb->pixel_format == DRM_FORMAT_NV12 && is_tile)
>> + return FRAME_TILE_YCBCR_420;
>> +
>> + return FRAME_LINEAR;
>> +}
>> +
>> static void mdp4_plane_set_scanout(struct drm_plane *plane,
>> struct drm_framebuffer *fb);
>> static int mdp4_plane_mode_set(struct drm_plane *plane,
>> @@ -205,6 +220,7 @@ static int mdp4_plane_mode_set(struct drm_plane *plane,
>> uint32_t op_mode = 0;
>> uint32_t phasex_step = MDP4_VG_PHASE_STEP_DEFAULT;
>> uint32_t phasey_step = MDP4_VG_PHASE_STEP_DEFAULT;
>> + enum mdp4_frame_format frame_type = mdp4_get_frame_format(fb);
>>
>> if (!(crtc && fb)) {
>> DBG("%s: disabled!", mdp4_plane->name);
>> @@ -304,6 +320,7 @@ static int mdp4_plane_mode_set(struct drm_plane *plane,
>> MDP4_PIPE_SRC_FORMAT_UNPACK_COUNT(format->unpack_count - 1) |
>> MDP4_PIPE_SRC_FORMAT_FETCH_PLANES(format->fetch_type) |
>> MDP4_PIPE_SRC_FORMAT_CHROMA_SAMP(format->chroma_sample) |
>> + MDP4_PIPE_SRC_FORMAT_FRAME_FORMAT(frame_type) |
>> COND(format->unpack_tight, MDP4_PIPE_SRC_FORMAT_UNPACK_TIGHT));
>>
>> mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_UNPACK(pipe),
>> @@ -324,6 +341,11 @@ static int mdp4_plane_mode_set(struct drm_plane *plane,
>> mdp4_write(mdp4_kms, REG_MDP4_PIPE_PHASEX_STEP(pipe), phasex_step);
>> mdp4_write(mdp4_kms, REG_MDP4_PIPE_PHASEY_STEP(pipe), phasey_step);
>>
>> + if (frame_type != FRAME_LINEAR)
>> + mdp4_write(mdp4_kms, REG_MDP4_PIPE_SSTILE_FRAME_SIZE(pipe),
>> + MDP4_PIPE_SSTILE_FRAME_SIZE_WIDTH(src_w) |
>> + MDP4_PIPE_SSTILE_FRAME_SIZE_HEIGHT(src_h));
>> +
>> return 0;
>> }
>>
>> diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
>> index 0773582..2f295cd 100644
>> --- a/include/uapi/drm/drm_fourcc.h
>> +++ b/include/uapi/drm/drm_fourcc.h
>> @@ -207,4 +207,19 @@
>> */
>> #define I915_FORMAT_MOD_Yf_TILED fourcc_mod_code(INTEL, 3)
>>
>> +/*
>> + * Tiled, NV12MT, grouped in 64 (pixels) x 32 (lines) -sized macroblocks
>> + *
>> + * Macroblocks are laid in a Z-shape, and each pixel data is following the
>> + * standard NV12 style.
>> + * As for NV12, an image is the result of two frame buffers: one for Y,
>> + * one for the interleaved Cb/Cr components (1/2 the height of the Y buffer).
>> + * Alignment requirements are (for each buffer):
>> + * - multiple of 128 pixels for the width
>> + * - multiple of 32 pixels for the height
>> + *
>> + * For more information: see http://linuxtv.org/downloads/v4l-dvb-apis/re32.html
>> + */
>> +#define DRM_FORMAT_MOD_SAMSUNG_64_32_TILE fourcc_mod_code(SAMSUNG, 1)
>> +
>> #endif /* DRM_FOURCC_H */
>> --
>> 2.4.1
>>
>
> --
> Daniel Vetter
> Software Engineer, Intel Corporation
> http://blog.ffwll.ch
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