Hello Kirill A. Shutemov,
The patch 026abc333205: "gma500: initial medfield merge" from Mar 8,
2012, leads to the following static checker warning:
drivers/gpu/drm/gma500/mdfld_intel_display.c:102 mdfldWaitForPipeEnable()
warn: masked condition '(temp & (1 << 30)) == 1' is always false.
drivers/gpu/drm/gma500/mdfld_intel_display.c
79 void mdfldWaitForPipeEnable(struct drm_device *dev, int pipe)
80 {
81 struct drm_psb_private *dev_priv = dev->dev_private;
82 const struct psb_offset *map = &dev_priv->regmap[pipe];
83 int count, temp;
84
85 switch (pipe) {
86 case 0:
87 case 1:
88 case 2:
89 break;
90 default:
91 DRM_ERROR("Illegal Pipe Number.\n");
92 return;
93 }
94
95 /* FIXME JLIU7_PO */
96 gma_wait_for_vblank(dev);
97 return;
98
99 /* Wait for for the pipe enable to take effect. */
100 for (count = 0; count < COUNT_MAX; count++) {
101 temp = REG_READ(map->conf);
102 if ((temp & PIPEACONF_PIPE_STATE) == 1)
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Never true. It meants we always loop until the timeout. I am tempted
to change it to:
if (temp & PIPEACONF_PIPE_STATE)
But removing delays is slightly risky unless you can test it on
hardware.
103 break;
104 }
105 }
regards,
dan carpenter
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