From: Steve Longerbeam <steve_longerbeam@xxxxxxxxxx> Previously, pixel clock polarity was hardcoded and wasn't configurable. This patch adds support to configure the pixel clock polarity from the DRM mode flags. [Sébastien - rebase] Signed-off-by: Mohsin Kazmi <mohsin_kazmi@xxxxxxxxxx> Signed-off-by: Steve Longerbeam <steve_longerbeam@xxxxxxxxxx> Signed-off-by: Sébastien Szymanski <sebastien.szymanski@xxxxxxxxxxxx> --- drivers/gpu/drm/imx/ipuv3-crtc.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/imx/ipuv3-crtc.c b/drivers/gpu/drm/imx/ipuv3-crtc.c index 98551e3..71f888b 100644 --- a/drivers/gpu/drm/imx/ipuv3-crtc.c +++ b/drivers/gpu/drm/imx/ipuv3-crtc.c @@ -171,10 +171,12 @@ static int ipu_crtc_mode_set(struct drm_crtc *crtc, else sig_cfg.clkflags = 0; + if (mode->flags & DRM_MODE_FLAG_PCLK) + sig_cfg.clk_pol = 1; + out_pixel_fmt = ipu_crtc->interface_pix_fmt; sig_cfg.enable_pol = 1; - sig_cfg.clk_pol = 0; sig_cfg.pixel_fmt = out_pixel_fmt; sig_cfg.v_to_h_sync = 0; sig_cfg.hsync_pin = ipu_crtc->di_hsync_pin; -- 2.0.5 _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/dri-devel
