https://bugzilla.kernel.org/show_bug.cgi?id=90741 --- Comment #73 from Michel Dänzer <michel@xxxxxxxxxxx> --- (In reply to Alex Deucher from comment #72) > Does reading any arbitrary register also work? E.g., SRBM_STATUS I think that would indeed be the right thing to do here, to prevent the PCIe bridge from delaying the register writes. Probably better to also check the fence status again after enabling the IRQ, to handle the case where the hardware might signal the fence after we check its status but before we enable the IRQ. -- You are receiving this mail because: You are watching the assignee of the bug. _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/dri-devel
