Hi,
On 02/02/2015 11:26 PM, Gustavo Padovan wrote:
> From: Prathyush K <prathyush.k@xxxxxxxxxxx>
>
> When VPLL clock of less than 140 MHz was used and all the three clocks -
> hdmiphy, hdmi, sclk_hdmi are disabled, the system hangs during S2R when
> HDMI is connected. Since we want to use a vpll clock of 70.5 MHz, we
> cannot disable these 3 clocks before suspending. This patch add an extra
> clk enable/disable of hdmi and sclk_hdmi outside of the pm ops so these
> clocks are always enabled. Now system suspends and resumes with HDMI
> connected with VPLL set at 70.5 MHz.
>
> This is not the best solution, but it inhibits a crash while we figure out
> what is the correct solution for this issue.
>
> Signed-off-by: Prathyush K <prathyush.k@xxxxxxxxxxx>
> Signed-off-by: Andrew Bresticker <abrestic@xxxxxxxxxxxx>
> Signed-off-by: Gustavo Padovan <gustavo.padovan@xxxxxxxxxxxxxxx>
> ---
> drivers/gpu/drm/exynos/exynos_hdmi.c | 20 ++++++++++++++++++++
> 1 file changed, 20 insertions(+)
>
> diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c b/drivers/gpu/drm/exynos/exynos_hdmi.c
> index 6aa0d65..c6baf64 100644
> --- a/drivers/gpu/drm/exynos/exynos_hdmi.c
> +++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
> @@ -2254,6 +2254,20 @@ static int hdmi_resources_init(struct hdmi_context *hdata)
> } else
> res->reg_hdmi_en = NULL;
>
> + /*
> + * For these two clocks exynos5420 fails to suspend if VPLL clock of
> + * 70.5 MHz is used and these clocks are disabled before suspend. So
> + * enable them here.
> + * Note that this will keep the clocks enabled for the entire
> + * lifetime of the driver and waste energy when it is suspended.
> + * However it prevents the system crash until a better solution is
> + * found
> + */
> + if (of_device_is_compatible(dev->of_node, "samsung,exynos5420-hdmi")) {
> + clk_prepare_enable(res->sclk_hdmi);
> + clk_prepare_enable(res->hdmi);
> + }
> +
> return ret;
> fail:
> DRM_ERROR("HDMI resource init - failed\n");
> @@ -2516,6 +2530,12 @@ static int hdmi_remove(struct platform_device *pdev)
> if (hdata->res.reg_hdmi_en)
> regulator_disable(hdata->res.reg_hdmi_en);
>
> + if (of_device_is_compatible(hdata->dev->of_node,
> + "samsung,exynos5420-hdmi")) {
> + clk_disable_unprepare(hdata->res.sclk_hdmi);
> + clk_disable_unprepare(hdata->res.hdmi);
> + }
> +
> if (hdata->hdmiphy_port)
> put_device(&hdata->hdmiphy_port->dev);
> put_device(&hdata->ddc_adpt->dev);
>
Looks fine to me but i'm not sure any there are any side effects to
change parent clock of mout_hdmi clock.
Acked-by: Joonyoung Shim <jy0922.shim@xxxxxxxxxxx>
Thanks.
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