On 01/05/2015 08:41 PM, Alex Deucher wrote:
On Mon, Jan 5, 2015 at 8:52 AM, Oded Gabbay <oded.gabbay@xxxxxxx> wrote:
From: Ben Goz <ben.goz@xxxxxxx>
This patch fixes a bug in kgd_set_pasid_vmid_mapping(), where the function
only updated the ATC registers (IOMMU) with the new VMID <--> PASID mapping,
but didn't update the IH (Interrupt) registers.
The bug only occurs when using non-HWS mode. In HWS mode, the CP automatically
does the VMID <--> PASID mapping.
Signed-off-by: Ben Goz <ben.goz@xxxxxxx>
Signed-off-by: Oded Gabbay <oded.gabbay@xxxxxxx>
I'm not too familiar with how these registers work. I'm assuming they
are just scratch registers that either the fw or the driver has to
update depending on the scheduling model? For the series:
Acked-by: Alex Deucher <alexander.deucher@xxxxxxx>
Yes, those registers need to be updated by the driver, if we are working in
non-HWS mode, or by the fw, if we are working in HWS mode, which is the default
mode and the "production" mode.
Oded
---
drivers/gpu/drm/radeon/cikd.h | 2 ++
drivers/gpu/drm/radeon/radeon_kfd.c | 4 ++++
2 files changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/radeon/cikd.h b/drivers/gpu/drm/radeon/cikd.h
index ba85986..03003f8 100644
--- a/drivers/gpu/drm/radeon/cikd.h
+++ b/drivers/gpu/drm/radeon/cikd.h
@@ -2156,4 +2156,6 @@
#define ATC_VM_APERTURE1_HIGH_ADDR 0x330Cu
#define ATC_VM_APERTURE1_LOW_ADDR 0x3304u
+#define IH_VMID_0_LUT 0x3D40u
+
#endif
diff --git a/drivers/gpu/drm/radeon/radeon_kfd.c b/drivers/gpu/drm/radeon/radeon_kfd.c
index a55afba..8bf87f1 100644
--- a/drivers/gpu/drm/radeon/radeon_kfd.c
+++ b/drivers/gpu/drm/radeon/radeon_kfd.c
@@ -390,6 +390,10 @@ static int kgd_set_pasid_vmid_mapping(struct kgd_dev *kgd, unsigned int pasid,
cpu_relax();
write_register(kgd, ATC_VMID_PASID_MAPPING_UPDATE_STATUS, 1U << vmid);
+ /* Mapping vmid to pasid also for IH block */
+ write_register(kgd, IH_VMID_0_LUT + vmid * sizeof(uint32_t),
+ pasid_mapping);
+
return 0;
}
--
1.9.1
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