On Fri, Nov 28, 2014 at 02:30:45PM +0100, Daniel Vetter wrote:
> Hi Dave,
>
> As discussed on irc here's the slightly late (because our QA cycle was a
> bit misaligned) final feature pull request for 3.19. I have a few fixes to
> sort out in my 3.20 queue, so will send you one more pull request next
> week with those. Then I'll hand over to Jani.
>
> drm-intel-next-2014-11-21:
> - infoframe tracking (for fastboot) from Jesse
> - start of the dri1/ums support removal
> - vlv forcewake timeout fixes (Imre)
> - bunch of patches to polish the rps code (Imre) and improve it on bdw (Tom
> O'Rourke)
> - on-demand pinning for execlist contexts
> - vlv/chv backlight improvements (Ville)
> - gen8+ render ctx w/a work from various people
> - skl edp programming (Satheeshakrishna et al.)
> - psr docbook (Rodrigo)
> - piles of little fixes and improvements all over, as usual
>
> Cheers, Daniel
>
>
> The following changes since commit e1f234bde6edb2bcdb763c90076b9484e4c71a33:
>
> drm/i915: Use correct pipe config to update pll dividers. V2 (2014-11-14 10:28:52 +0100)
>
> are available in the git repository at:
>
> git://anongit.freedesktop.org/drm-intel tags/drm-intel-next-2014-11-21
>
> for you to fetch changes up to e7f1d0b735fd4bbec225a83de2aa8f52a0a2e95c:
>
> drm/i915: Update DRIVER_DATE to 20141121 (2014-11-21 10:37:14 +0100)
>
> ----------------------------------------------------------------
> - infoframe tracking (for fastboot) from Jesse
> - start of the dri1/ums support removal
> - vlv forcewake timeout fixes (Imre)
> - bunch of patches to polish the rps code (Imre) and improve it on bdw (Tom
> O'Rourke)
> - on-demand pinning for execlist contexts
> - vlv/chv backlight improvements (Ville)
> - gen8+ render ctx w/a work from various people
> - skl edp programming (Satheeshakrishna et al.)
> - psr docbook (Rodrigo)
> - piles of little fixes and improvements all over, as usual
>
> ----------------------------------------------------------------
Forgotten to add: I had to do a backmerge due to fun, shortlog of just the
stuff new compared to Linus' tree below.
-Daniel
Alexey Khoroshilov (1):
drm/i915: avoid deadlock on failure paths in __intel_framebuffer_create()
Arun Siluvery (3):
drm/i915/chv: Remove pre-production workarounds
drm/i915/chv: Combine GEN8_ROW_CHICKEN w/a
drm/i915/chv: Add new workarounds for chv
Chris Wilson (4):
drm/i915: Make the physical object coherent with GTT
drm/i915: Don't continually defer the hangcheck
drm/i915: Remove DRI1 ring accessors and API
drm/i915: Only call mod_timer() if not already pending
Damien Lespiau (9):
drm/i915/skl: Provide skl-specific pll hw state cross-checking
drm/i915/skl: Implement queue_flip
drm/i915: Clear PCODE_DATA1 on SNB+
drm/i915: Let's hope future platforms will use the same WM code as SKL
drm/i915/skl: Fix big integer constant sparse warning
drm/i915/skl: Don't allow disabling ppgtt and execlists on gen9+
drm/i915/skl: Remove spurious warn in get_ddi_pll()
drm/i915/skl: Set the eDP link rate on DPLL0
drm/i915/skl: Use the pipe config DPLL tracking to query the link clock
Daniel Vetter (16):
drm/i915: Delete outdated comment in byt_pte_encode
drm/i915: Drop return value from lrc_setup_hardware_status_page
drm/i915: Don't print header in error state for non-existing CS
drm/i915: Tune down sink crc timeout dmesg output
Merge tag 'drm-intel-fixes-2014-11-19' into drm-intel-next-queued
drm/i915: Replace dri1 functions with drm_noop
drm/i915: Drop checks for initialization
drm/i915: No-Op enter/leave vt gem ioctl
drm/i915: Ditch dev_priv->ums.mm_suspend
drm/i915: Sanitize ->lastclose
drm/i915: Can i915_gem_init_ioctl
drm/i915: Pin tiled objects for L-shaped configs
drm/i915: Dump hdmi pipe_config state
drm/i915: Use ggtt error obj capture helper for gen8 semaphores
drm/i915: Don't rely upon encoder->type for infoframe hw state readout
drm/i915: Update DRIVER_DATE to 20141121
Daniele Ceraolo Spurio (1):
drm/i915: Add tracepoints to track a vm during its lifetime
Imre Deak (13):
drm/i915: unify gen6/gen8 pm irq helpers
drm/i915: unify gen6/gen8 rps irq handler
drm/i915: unify gen6/gen8 rps irq enable/disable
drm/i915: move rps irq enable/disable to i915_irq.c
drm/i915: WARN if we receive any gen9 rps interrupts
drm/i915: WARN if we receive any rps interrupts on gen>9
drm/i915: move rps irq disable one level up
drm/i915: sanitize rps irq enabling
drm/i915: sanitize rps irq disabling
drm/i915: disable rps irqs earlier during suspend/unload
drm/i915: vlv: fix cdclk setting during modeset while suspended
drm/i915: vlv: increase timeout when setting idle GPU freq
drm/i915: remove the IRQs enabled WARN from intel_disable_gt_powersave
Jani Nikula (8):
drm/edid: fix Baseline_ELD_Len field in drm_edid_to_eld()
drm/i915/vlv: don't save panel power sequencer registers on suspend
drm/i915: restore RSTDBYCTL only on non-KMS paths
drm/i915: remove the unnecessary block around display.hpd_irq_setup
drm/i915: don't save/restore panel fitter registers
drm/i915: don't save/restore backlight hist ctl registers
drm/i915: unify remaining register save/restore code a bit
drm/i915/audio: fix monitor presence indication after disable
Jesse Barnes (11):
drm/i915: factor out compute_config from __intel_set_mode v3
drm/i915: use compute_config in set_config v4
drm/i915/hdmi: fetch infoframe status in get_config v2
drm/i915: check for audio and infoframe changes across mode sets v2
drm/i915: update pipe size at set_config time
drm/i915: preserve SSC if previously set v3
drm/i915/skl: fetch, enable/disable pfit as needed v2
drm/i915/skl: AUX irqs have moved
drm/i915/ddi: add break in DDI mode select switch
drm/i915/ddi: set has_infoframe flag on DDI too v2
drm/i915/g4x: fix g4x infoframe readout
Matt Roper (2):
drm/i915: Propagate invalid setcrtc cloning errors back to userspace
drm/i915: Don't store panning coordinates as 16.16 fixed point
Michael H. Nguyen (1):
drm/i915/skl: Add Gen9 LRC size
Michel Thierry (1):
drm/i915: Initialize workarounds in logical ring mode too
Mika Kuoppala (1):
drm/i915: Wait thread status on gen8+ fw sequence
Neil Roberts (1):
drm/i915: Add the predicate source registers to the register whitelist
Oscar Mateo (1):
drm/i915/bdw: Pin the context backing objects to GGTT on-demand
Paulo Zanoni (1):
drm/i915: use the correct obj when preparing the sprite plane
Rodrigo Vivi (3):
drm/i915: Make dp aux pack/unpack public outside intel_dp.c
drm/i915: Introduce intel_psr.c
drm/i915: Add PSR docbook
Satheeshakrishna M (8):
drm/i915/skl: Register definitions for SKL Clocks
drm/i915/skl: Structure/enum definitions for SKL clocks
drm/i915/skl: CD clock back calculation for SKL
drm/i915/skl: Determine enabled PLL and its linkrate/pixel clock
drm/i915/skl: Query DPLL attached to port on SKL
drm/i915/skl: Define shared DPLLs for Skylake
drm/i915/skl: Adjust the port PLL selection code
drm/i915/skl: Implementation of SKL DPLL programming
Thomas Daniel (2):
drm/i915/bdw: Clean up execlist queue items in retire_work
drm/i915/bdw: Pin the ringbuffer backing object to GGTT on-demand
Tom O'Rourke (5):
drm/i915: Extend pcode mailbox interface
drm/i915: Use efficient frequency for HSW/BDW
drm/i915: Keep min freq above floor on HSW/BDW
drm/i915: change initial rps frequency for gen8
drm/i915: Update ring freq for full gpu freq range
Tvrtko Ursulin (1):
drm/i915/skl: Use correct use counters for force wakes
Vandana Kannan (1):
drm/i915/skl: Apply eDP WA only for gen < 9
Ville Syrjälä (21):
drm/i915: Warn if trying to poke a VLV backlight on invalid pipe
drm/i915: Skip .get_backlight() when backlight isn't enabled
drm/i915: Don't deref NULL crtc in intel_get_pipe_from_connector()
drm/i915: Pass the current pipe from eDP init to backlight setup
drm/i915: Register the backlight device after the modeset init
drm/i915: Remove most INVALID_PIPE checks from the backlight code
drm/i915: Read the CCK fuse register from CCK
drm/i915: Refactor vlv_display_irq_uninstall()
drm/i915: Use vlv display irq setup code for chv
drm/i915: Fix comments about CHV snoop behaviour
drm/i915: Reinit display irqs and hpd from chv pipe-a power well
drm/i915: Silence valleyview_set_rps()
drm/i915: Add a name for the Punit GPLLENABLE bit
drm/i915: Warn if GPLL isn't used on vlv/chv
drm/i915: Improve PCBR debug information
drm/i915: Refactor vlv/chv GPU frequency divider setup
drm/i915: Add missing newline to 'DDR speed' debug messages
drm/i915: Change CHV SKU400 GPU freq divider to 10
drm/i915: Drop the HSW special case from __gen6_gt_wait_for_thread_c0()
drm/i915: Drop WaRsForcewakeWaitTC0:vlv
drm/i915: Read power well status before other registers for drpc info
Zhe Wang (2):
drm/i915/skl: Gen9 multi-engine forcewake
drm/i915: Gen9 shadowed registers
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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