[Bug 84977] r300/compiler: register allocation pass generate invalid swizzle for r300/r400

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Comment # 9 on bug 84977 from
class_index: 1, dstindex: 8, writemask: 3, can_change: 0
class_index: 0, dstindex: 35, writemask: 1, can_change: 1
class_index: 0, dstindex: 41, writemask: 1, can_change: 1
class_index: 0, dstindex: 20, writemask: 1, can_change: 1
class_index: 1, dstindex: 9, writemask: 3, can_change: 0
class_index: 1, dstindex: 10, writemask: 3, can_change: 0
class_index: 0, dstindex: 45, writemask: 1, can_change: 1
class_index: 0, dstindex: 38, writemask: 1, can_change: 1
class_index: 1, dstindex: 11, writemask: 3, can_change: 0
class_index: 1, dstindex: 12, writemask: 3, can_change: 0
class_index: 0, dstindex: 13, writemask: 4, can_change: 1
class_index: 0, dstindex: 14, writemask: 4, can_change: 1
class_index: 0, dstindex: 15, writemask: 4, can_change: 1
class_index: 4, dstindex: 16, writemask: 12, can_change: 1
class_index: 1, dstindex: 17, writemask: 3, can_change: 0
class_index: 0, dstindex: 18, writemask: 2, can_change: 1
class_index: 0, dstindex: 30, writemask: 1, can_change: 1
Not a native swizzle: 00000fc3

Not sure, if I fully get it. It has only INST up to 43. Why is there dstindex
45?


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