It seems good to me.
For the serie
Reviewed-by: Alexandre Demers <alexandre.f.demers@xxxxxxxxx>
For for 1 and 5
Tested-by: Alexandre Demers <alexandre.f.demers@xxxxxxxxx> on kernel 3.17-rc6
On Tue, Sep 23, 2014 at 9:52 AM, Alex Deucher <alexdeucher@xxxxxxxxx> wrote:
> On Tue, Sep 23, 2014 at 1:08 AM, Alexandre Demers
> <alexandre.f.demers@xxxxxxxxx> wrote:
>> Typo: this should be "Tested on kernel 3.17-rc6 on..."
>>
>> Alexandre Demers
>>
>>
>> On 23/09/14 12:42 AM, Alexandre Demers wrote:
>>>
>>> Now that vddci has been fixed for dpm, we can let the GPUs
>>> use their maximum values when not using the reference ones.
>>>
>>> Fixes bug 69721: Can't reach maximum memory speed (or core
>>> speed) when using dpm=1 on r600g on cards not sticking to
>>> reference board
>>>
>>> Tested on kernel 3.17-rc7 on a cayman gpu.
>>>
>>> Signed-off-by: Alexandre Demers <alexandre.f.demers@xxxxxxxxx>
>
> Thanks for testing this. I'd rather split this up into multiple
> patches in case we need to revert it on a specific asic family if
> problems arise. How about the attached patches?
>
> Alex
>
>>>
>>> ---
>>> drivers/gpu/drm/radeon/btc_dpm.c | 51
>>> ----------------------------------------
>>> drivers/gpu/drm/radeon/btc_dpm.h | 2 --
>>> drivers/gpu/drm/radeon/ci_dpm.c | 26 --------------------
>>> drivers/gpu/drm/radeon/ni_dpm.c | 24 -------------------
>>> drivers/gpu/drm/radeon/si_dpm.c | 24 -------------------
>>> 5 files changed, 127 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/radeon/btc_dpm.c
>>> b/drivers/gpu/drm/radeon/btc_dpm.c
>>> index f81d7ca..300d971 100644
>>> --- a/drivers/gpu/drm/radeon/btc_dpm.c
>>> +++ b/drivers/gpu/drm/radeon/btc_dpm.c
>>> @@ -1170,23 +1170,6 @@ static const struct radeon_blacklist_clocks
>>> btc_blacklist_clocks[] =
>>> { 25000, 30000, RADEON_SCLK_UP }
>>> };
>>> -void btc_get_max_clock_from_voltage_dependency_table(struct
>>> radeon_clock_voltage_dependency_table *table,
>>> - u32 *max_clock)
>>> -{
>>> - u32 i, clock = 0;
>>> -
>>> - if ((table == NULL) || (table->count == 0)) {
>>> - *max_clock = clock;
>>> - return;
>>> - }
>>> -
>>> - for (i = 0; i < table->count; i++) {
>>> - if (clock < table->entries[i].clk)
>>> - clock = table->entries[i].clk;
>>> - }
>>> - *max_clock = clock;
>>> -}
>>> -
>>> void btc_apply_voltage_dependency_rules(struct
>>> radeon_clock_voltage_dependency_table *table,
>>> u32 clock, u16 max_voltage, u16
>>> *voltage)
>>> {
>>> @@ -2099,7 +2082,6 @@ static void btc_apply_state_adjust_rules(struct
>>> radeon_device *rdev,
>>> bool disable_mclk_switching;
>>> u32 mclk, sclk;
>>> u16 vddc, vddci;
>>> - u32 max_sclk_vddc, max_mclk_vddci, max_mclk_vddc;
>>> if ((rdev->pm.dpm.new_active_crtc_count > 1) ||
>>> btc_dpm_vblank_too_short(rdev))
>>> @@ -2141,39 +2123,6 @@ static void btc_apply_state_adjust_rules(struct
>>> radeon_device *rdev,
>>> ps->low.vddci = max_limits->vddci;
>>> }
>>> - /* limit clocks to max supported clocks based on voltage
>>> dependency tables */
>>> -
>>> btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk,
>>> - &max_sclk_vddc);
>>> -
>>> btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk,
>>> - &max_mclk_vddci);
>>> -
>>> btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk,
>>> - &max_mclk_vddc);
>>> -
>>> - if (max_sclk_vddc) {
>>> - if (ps->low.sclk > max_sclk_vddc)
>>> - ps->low.sclk = max_sclk_vddc;
>>> - if (ps->medium.sclk > max_sclk_vddc)
>>> - ps->medium.sclk = max_sclk_vddc;
>>> - if (ps->high.sclk > max_sclk_vddc)
>>> - ps->high.sclk = max_sclk_vddc;
>>> - }
>>> - if (max_mclk_vddci) {
>>> - if (ps->low.mclk > max_mclk_vddci)
>>> - ps->low.mclk = max_mclk_vddci;
>>> - if (ps->medium.mclk > max_mclk_vddci)
>>> - ps->medium.mclk = max_mclk_vddci;
>>> - if (ps->high.mclk > max_mclk_vddci)
>>> - ps->high.mclk = max_mclk_vddci;
>>> - }
>>> - if (max_mclk_vddc) {
>>> - if (ps->low.mclk > max_mclk_vddc)
>>> - ps->low.mclk = max_mclk_vddc;
>>> - if (ps->medium.mclk > max_mclk_vddc)
>>> - ps->medium.mclk = max_mclk_vddc;
>>> - if (ps->high.mclk > max_mclk_vddc)
>>> - ps->high.mclk = max_mclk_vddc;
>>> - }
>>> -
>>> /* XXX validate the min clocks required for display */
>>> if (disable_mclk_switching) {
>>> diff --git a/drivers/gpu/drm/radeon/btc_dpm.h
>>> b/drivers/gpu/drm/radeon/btc_dpm.h
>>> index 3b6f12b..1a15e0e 100644
>>> --- a/drivers/gpu/drm/radeon/btc_dpm.h
>>> +++ b/drivers/gpu/drm/radeon/btc_dpm.h
>>> @@ -46,8 +46,6 @@ void btc_adjust_clock_combinations(struct radeon_device
>>> *rdev,
>>> struct rv7xx_pl *pl);
>>> void btc_apply_voltage_dependency_rules(struct
>>> radeon_clock_voltage_dependency_table *table,
>>> u32 clock, u16 max_voltage, u16
>>> *voltage);
>>> -void btc_get_max_clock_from_voltage_dependency_table(struct
>>> radeon_clock_voltage_dependency_table *table,
>>> - u32 *max_clock);
>>> void btc_apply_voltage_delta_rules(struct radeon_device *rdev,
>>> u16 max_vddc, u16 max_vddci,
>>> u16 *vddc, u16 *vddci);
>>> diff --git a/drivers/gpu/drm/radeon/ci_dpm.c
>>> b/drivers/gpu/drm/radeon/ci_dpm.c
>>> index d416bb2..d199be3 100644
>>> --- a/drivers/gpu/drm/radeon/ci_dpm.c
>>> +++ b/drivers/gpu/drm/radeon/ci_dpm.c
>>> @@ -162,8 +162,6 @@ static const struct ci_pt_config_reg didt_config_ci[]
>>> =
>>> };
>>> extern u8 rv770_get_memory_module_index(struct radeon_device *rdev);
>>> -extern void btc_get_max_clock_from_voltage_dependency_table(struct
>>> radeon_clock_voltage_dependency_table *table,
>>> - u32
>>> *max_clock);
>>> extern int ni_copy_and_switch_arb_sets(struct radeon_device *rdev,
>>> u32 arb_freq_src, u32
>>> arb_freq_dest);
>>> extern u8 si_get_ddr3_mclk_frequency_ratio(u32 memory_clock);
>>> @@ -748,7 +746,6 @@ static void ci_apply_state_adjust_rules(struct
>>> radeon_device *rdev,
>>> struct radeon_clock_and_voltage_limits *max_limits;
>>> bool disable_mclk_switching;
>>> u32 sclk, mclk;
>>> - u32 max_sclk_vddc, max_mclk_vddci, max_mclk_vddc;
>>> int i;
>>> if (rps->vce_active) {
>>> @@ -784,29 +781,6 @@ static void ci_apply_state_adjust_rules(struct
>>> radeon_device *rdev,
>>> }
>>> }
>>> - /* limit clocks to max supported clocks based on voltage
>>> dependency tables */
>>> -
>>> btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk,
>>> - &max_sclk_vddc);
>>> -
>>> btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk,
>>> - &max_mclk_vddci);
>>> -
>>> btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk,
>>> - &max_mclk_vddc);
>>> -
>>> - for (i = 0; i < ps->performance_level_count; i++) {
>>> - if (max_sclk_vddc) {
>>> - if (ps->performance_levels[i].sclk >
>>> max_sclk_vddc)
>>> - ps->performance_levels[i].sclk =
>>> max_sclk_vddc;
>>> - }
>>> - if (max_mclk_vddci) {
>>> - if (ps->performance_levels[i].mclk >
>>> max_mclk_vddci)
>>> - ps->performance_levels[i].mclk =
>>> max_mclk_vddci;
>>> - }
>>> - if (max_mclk_vddc) {
>>> - if (ps->performance_levels[i].mclk >
>>> max_mclk_vddc)
>>> - ps->performance_levels[i].mclk =
>>> max_mclk_vddc;
>>> - }
>>> - }
>>> -
>>> /* XXX validate the min clocks required for display */
>>> if (disable_mclk_switching) {
>>> diff --git a/drivers/gpu/drm/radeon/ni_dpm.c
>>> b/drivers/gpu/drm/radeon/ni_dpm.c
>>> index 01fc488..715b181 100644
>>> --- a/drivers/gpu/drm/radeon/ni_dpm.c
>>> +++ b/drivers/gpu/drm/radeon/ni_dpm.c
>>> @@ -789,7 +789,6 @@ static void ni_apply_state_adjust_rules(struct
>>> radeon_device *rdev,
>>> bool disable_mclk_switching;
>>> u32 mclk;
>>> u16 vddci;
>>> - u32 max_sclk_vddc, max_mclk_vddci, max_mclk_vddc;
>>> int i;
>>> if ((rdev->pm.dpm.new_active_crtc_count > 1) ||
>>> @@ -816,29 +815,6 @@ static void ni_apply_state_adjust_rules(struct
>>> radeon_device *rdev,
>>> }
>>> }
>>> - /* limit clocks to max supported clocks based on voltage
>>> dependency tables */
>>> -
>>> btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk,
>>> - &max_sclk_vddc);
>>> -
>>> btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk,
>>> - &max_mclk_vddci);
>>> -
>>> btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk,
>>> - &max_mclk_vddc);
>>> -
>>> - for (i = 0; i < ps->performance_level_count; i++) {
>>> - if (max_sclk_vddc) {
>>> - if (ps->performance_levels[i].sclk >
>>> max_sclk_vddc)
>>> - ps->performance_levels[i].sclk =
>>> max_sclk_vddc;
>>> - }
>>> - if (max_mclk_vddci) {
>>> - if (ps->performance_levels[i].mclk >
>>> max_mclk_vddci)
>>> - ps->performance_levels[i].mclk =
>>> max_mclk_vddci;
>>> - }
>>> - if (max_mclk_vddc) {
>>> - if (ps->performance_levels[i].mclk >
>>> max_mclk_vddc)
>>> - ps->performance_levels[i].mclk =
>>> max_mclk_vddc;
>>> - }
>>> - }
>>> -
>>> /* XXX validate the min clocks required for display */
>>> /* adjust low state */
>>> diff --git a/drivers/gpu/drm/radeon/si_dpm.c
>>> b/drivers/gpu/drm/radeon/si_dpm.c
>>> index 70e61ff..9e4d5d7 100644
>>> --- a/drivers/gpu/drm/radeon/si_dpm.c
>>> +++ b/drivers/gpu/drm/radeon/si_dpm.c
>>> @@ -2916,7 +2916,6 @@ static void si_apply_state_adjust_rules(struct
>>> radeon_device *rdev,
>>> bool disable_sclk_switching = false;
>>> u32 mclk, sclk;
>>> u16 vddc, vddci;
>>> - u32 max_sclk_vddc, max_mclk_vddci, max_mclk_vddc;
>>> int i;
>>> if ((rdev->pm.dpm.new_active_crtc_count > 1) ||
>>> @@ -2950,29 +2949,6 @@ static void si_apply_state_adjust_rules(struct
>>> radeon_device *rdev,
>>> }
>>> }
>>> - /* limit clocks to max supported clocks based on voltage
>>> dependency tables */
>>> -
>>> btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk,
>>> - &max_sclk_vddc);
>>> -
>>> btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk,
>>> - &max_mclk_vddci);
>>> -
>>> btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk,
>>> - &max_mclk_vddc);
>>> -
>>> - for (i = 0; i < ps->performance_level_count; i++) {
>>> - if (max_sclk_vddc) {
>>> - if (ps->performance_levels[i].sclk >
>>> max_sclk_vddc)
>>> - ps->performance_levels[i].sclk =
>>> max_sclk_vddc;
>>> - }
>>> - if (max_mclk_vddci) {
>>> - if (ps->performance_levels[i].mclk >
>>> max_mclk_vddci)
>>> - ps->performance_levels[i].mclk =
>>> max_mclk_vddci;
>>> - }
>>> - if (max_mclk_vddc) {
>>> - if (ps->performance_levels[i].mclk >
>>> max_mclk_vddc)
>>> - ps->performance_levels[i].mclk =
>>> max_mclk_vddc;
>>> - }
>>> - }
>>> -
>>> /* XXX validate the min clocks required for display */
>>> if (disable_mclk_switching) {
>>
>>
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