This patch adds the lp_parent clk to the dsi node for tegra114. The TRM states that PLLP should be used upstream of the low power dsi clock. Signed-off-by: Sean Paul <seanpaul@xxxxxxxxxxxx> --- arch/arm/boot/dts/tegra114.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi index 80b8edd..20f78e7 100644 --- a/arch/arm/boot/dts/tegra114.dtsi +++ b/arch/arm/boot/dts/tegra114.dtsi @@ -99,7 +99,8 @@ clocks = <&tegra_car TEGRA114_CLK_DSIA>, <&tegra_car TEGRA114_CLK_DSIALP>, <&tegra_car TEGRA114_CLK_PLL_D_OUT0>; - clock-names = "dsi", "lp", "parent"; + <&tegra_car TEGRA114_CLK_PLL_P>; + clock-names = "dsi", "lp", "parent", "lp_parent"; resets = <&tegra_car 48>; reset-names = "dsi"; nvidia,mipi-calibrate = <&mipi 0x060>; /* DSIA & DSIB pads */ -- 2.0.0 _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/dri-devel
