On Wed, Jul 9, 2014 at 2:15 PM, Christian König <deathsimple@xxxxxxxxxxx> wrote:
> From: Michel Dänzer <michel.daenzer@xxxxxxx>
>
> Doesn't seem necessary, the GART table memory should be persistent.
>
> Signed-off-by: Michel Dänzer <michel.daenzer@xxxxxxx>
Reviewed-by: Alex Deucher <alexander.deucher@xxxxxxx>
I'll add this one to my drm-next tree. Separate comments on the other patches.
Alex
> ---
> drivers/gpu/drm/radeon/cik.c | 1 -
> drivers/gpu/drm/radeon/evergreen.c | 1 -
> drivers/gpu/drm/radeon/ni.c | 1 -
> drivers/gpu/drm/radeon/r100.c | 1 -
> drivers/gpu/drm/radeon/r300.c | 1 -
> drivers/gpu/drm/radeon/r600.c | 1 -
> drivers/gpu/drm/radeon/radeon.h | 1 -
> drivers/gpu/drm/radeon/radeon_gart.c | 27 ---------------------------
> drivers/gpu/drm/radeon/rs400.c | 1 -
> drivers/gpu/drm/radeon/rs600.c | 1 -
> drivers/gpu/drm/radeon/rv770.c | 1 -
> drivers/gpu/drm/radeon/si.c | 1 -
> 12 files changed, 38 deletions(-)
>
> diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
> index dcd4518..0cb363a 100644
> --- a/drivers/gpu/drm/radeon/cik.c
> +++ b/drivers/gpu/drm/radeon/cik.c
> @@ -5401,7 +5401,6 @@ static int cik_pcie_gart_enable(struct radeon_device *rdev)
> r = radeon_gart_table_vram_pin(rdev);
> if (r)
> return r;
> - radeon_gart_restore(rdev);
> /* Setup TLB control */
> WREG32(MC_VM_MX_L1_TLB_CNTL,
> (0xA << 7) |
> diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
> index e2f6052..8471f32 100644
> --- a/drivers/gpu/drm/radeon/evergreen.c
> +++ b/drivers/gpu/drm/radeon/evergreen.c
> @@ -2424,7 +2424,6 @@ static int evergreen_pcie_gart_enable(struct radeon_device *rdev)
> r = radeon_gart_table_vram_pin(rdev);
> if (r)
> return r;
> - radeon_gart_restore(rdev);
> /* Setup L2 cache */
> WREG32(VM_L2_CNTL, ENABLE_L2_CACHE | ENABLE_L2_FRAGMENT_PROCESSING |
> ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE |
> diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c
> index 5a33ca6..327b85f 100644
> --- a/drivers/gpu/drm/radeon/ni.c
> +++ b/drivers/gpu/drm/radeon/ni.c
> @@ -1229,7 +1229,6 @@ static int cayman_pcie_gart_enable(struct radeon_device *rdev)
> r = radeon_gart_table_vram_pin(rdev);
> if (r)
> return r;
> - radeon_gart_restore(rdev);
> /* Setup TLB control */
> WREG32(MC_VM_MX_L1_TLB_CNTL,
> (0xA << 7) |
> diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
> index 1544efc..ed1c53e 100644
> --- a/drivers/gpu/drm/radeon/r100.c
> +++ b/drivers/gpu/drm/radeon/r100.c
> @@ -652,7 +652,6 @@ int r100_pci_gart_enable(struct radeon_device *rdev)
> {
> uint32_t tmp;
>
> - radeon_gart_restore(rdev);
> /* discard memory request outside of configured range */
> tmp = RREG32(RADEON_AIC_CNTL) | RADEON_DIS_OUT_OF_PCI_GART_ACCESS;
> WREG32(RADEON_AIC_CNTL, tmp);
> diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c
> index 3c21d77..8d14e66 100644
> --- a/drivers/gpu/drm/radeon/r300.c
> +++ b/drivers/gpu/drm/radeon/r300.c
> @@ -120,7 +120,6 @@ int rv370_pcie_gart_enable(struct radeon_device *rdev)
> r = radeon_gart_table_vram_pin(rdev);
> if (r)
> return r;
> - radeon_gart_restore(rdev);
> /* discard memory request outside of configured range */
> tmp = RADEON_PCIE_TX_GART_UNMAPPED_ACCESS_DISCARD;
> WREG32_PCIE(RADEON_PCIE_TX_GART_CNTL, tmp);
> diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
> index c66952d..e1be5ce 100644
> --- a/drivers/gpu/drm/radeon/r600.c
> +++ b/drivers/gpu/drm/radeon/r600.c
> @@ -968,7 +968,6 @@ static int r600_pcie_gart_enable(struct radeon_device *rdev)
> r = radeon_gart_table_vram_pin(rdev);
> if (r)
> return r;
> - radeon_gart_restore(rdev);
>
> /* Setup L2 cache */
> WREG32(VM_L2_CNTL, ENABLE_L2_CACHE | ENABLE_L2_FRAGMENT_PROCESSING |
> diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
> index 29d9cc0..c16652a 100644
> --- a/drivers/gpu/drm/radeon/radeon.h
> +++ b/drivers/gpu/drm/radeon/radeon.h
> @@ -614,7 +614,6 @@ void radeon_gart_unbind(struct radeon_device *rdev, unsigned offset,
> int radeon_gart_bind(struct radeon_device *rdev, unsigned offset,
> int pages, struct page **pagelist,
> dma_addr_t *dma_addr);
> -void radeon_gart_restore(struct radeon_device *rdev);
>
>
> /*
> diff --git a/drivers/gpu/drm/radeon/radeon_gart.c b/drivers/gpu/drm/radeon/radeon_gart.c
> index 2e72365..b7d3e84 100644
> --- a/drivers/gpu/drm/radeon/radeon_gart.c
> +++ b/drivers/gpu/drm/radeon/radeon_gart.c
> @@ -298,33 +298,6 @@ int radeon_gart_bind(struct radeon_device *rdev, unsigned offset,
> }
>
> /**
> - * radeon_gart_restore - bind all pages in the gart page table
> - *
> - * @rdev: radeon_device pointer
> - *
> - * Binds all pages in the gart page table (all asics).
> - * Used to rebuild the gart table on device startup or resume.
> - */
> -void radeon_gart_restore(struct radeon_device *rdev)
> -{
> - int i, j, t;
> - u64 page_base;
> -
> - if (!rdev->gart.ptr) {
> - return;
> - }
> - for (i = 0, t = 0; i < rdev->gart.num_cpu_pages; i++) {
> - page_base = rdev->gart.pages_addr[i];
> - for (j = 0; j < (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); j++, t++) {
> - radeon_gart_set_page(rdev, t, page_base);
> - page_base += RADEON_GPU_PAGE_SIZE;
> - }
> - }
> - mb();
> - radeon_gart_tlb_flush(rdev);
> -}
> -
> -/**
> * radeon_gart_init - init the driver info for managing the gart
> *
> * @rdev: radeon_device pointer
> diff --git a/drivers/gpu/drm/radeon/rs400.c b/drivers/gpu/drm/radeon/rs400.c
> index a0f96de..4519f9c 100644
> --- a/drivers/gpu/drm/radeon/rs400.c
> +++ b/drivers/gpu/drm/radeon/rs400.c
> @@ -109,7 +109,6 @@ int rs400_gart_enable(struct radeon_device *rdev)
> uint32_t size_reg;
> uint32_t tmp;
>
> - radeon_gart_restore(rdev);
> tmp = RREG32_MC(RS690_AIC_CTRL_SCRATCH);
> tmp |= RS690_DIS_OUT_OF_PCI_GART_ACCESS;
> WREG32_MC(RS690_AIC_CTRL_SCRATCH, tmp);
> diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c
> index d1a35cb..27a56ad 100644
> --- a/drivers/gpu/drm/radeon/rs600.c
> +++ b/drivers/gpu/drm/radeon/rs600.c
> @@ -555,7 +555,6 @@ static int rs600_gart_enable(struct radeon_device *rdev)
> r = radeon_gart_table_vram_pin(rdev);
> if (r)
> return r;
> - radeon_gart_restore(rdev);
> /* Enable bus master */
> tmp = RREG32(RADEON_BUS_CNTL) & ~RS600_BUS_MASTER_DIS;
> WREG32(RADEON_BUS_CNTL, tmp);
> diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c
> index da8703d..2983f17 100644
> --- a/drivers/gpu/drm/radeon/rv770.c
> +++ b/drivers/gpu/drm/radeon/rv770.c
> @@ -900,7 +900,6 @@ static int rv770_pcie_gart_enable(struct radeon_device *rdev)
> r = radeon_gart_table_vram_pin(rdev);
> if (r)
> return r;
> - radeon_gart_restore(rdev);
> /* Setup L2 cache */
> WREG32(VM_L2_CNTL, ENABLE_L2_CACHE | ENABLE_L2_FRAGMENT_PROCESSING |
> ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE |
> diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c
> index eba0225..ba2b453 100644
> --- a/drivers/gpu/drm/radeon/si.c
> +++ b/drivers/gpu/drm/radeon/si.c
> @@ -4048,7 +4048,6 @@ static int si_pcie_gart_enable(struct radeon_device *rdev)
> r = radeon_gart_table_vram_pin(rdev);
> if (r)
> return r;
> - radeon_gart_restore(rdev);
> /* Setup TLB control */
> WREG32(MC_VM_MX_L1_TLB_CNTL,
> (0xA << 7) |
> --
> 1.9.1
>
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