On Mon, Jun 9, 2014 at 1:56 PM, Stephen Boyd <sboyd@xxxxxxxxxxxxxx> wrote: > On 06/06/14 07:03, Stephane Viau wrote: >> The clock driver usually complains when a clock is being prepared >> before setting its rate. It is the case here for "core_clk" which >> needs to be set at 19.2 MHz before we attempt a prepare_enable(). > > That's only true in the downstream vendor kernel. Upstream we detect all > rates when clocks are registered. Given that 19.2Mhz is the default rate > out of reset for this clock this patch is fairly useless. > well, I've got this patch (with a slight tweak) queued up already.. I'm tempted to keep it, unless downstream kernel can be fixed, just to make it easier to sync things back to downstream kernel.. BR, -R > -- > Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, > hosted by The Linux Foundation > _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/dri-devel
