On Fri, May 23, 2014 at 06:58:32PM -0700, Stéphane Marchesin wrote: > The display controller doesn't handle non-256 byte aligned buffer > pitches. If you give it an unaligned buffer, it will stop after the > first line and will report underflows in the debug registers > (DC_WINBUF_UFLOW_STATUS and friends). So let's make sure that all our > framebuffer pitches are 256-byte aligned. > > Signed-off-by: Stéphane Marchesin <marcheu@xxxxxxxxxxxx> > --- > drivers/gpu/drm/tegra/drm.h | 2 ++ > drivers/gpu/drm/tegra/fb.c | 3 ++- > drivers/gpu/drm/tegra/gem.c | 2 ++ > 3 files changed, 6 insertions(+), 1 deletion(-) Can you point me to where this requirement is documented? I've gone through the TRM and all I can find is that the line stride needs to be 64 byte aligned. Also I seem to remember that resolutions such as 1366x768 used to work for HDMI at least on earlier Tegra generations. Perhaps this is a requirement that's new on Tegra124? Thierry
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