This patch adds phy settings of the below
mentioned pixel clocks in Exynos5420:
85.5 MHz - 1366x768@60Hz
162 MHz - 1600x1200@60Hz
Signed-off-by: Shirish S <s.shirish@xxxxxxxxxxx>
---
drivers/gpu/drm/exynos/exynos_hdmi.c | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c b/drivers/gpu/drm/exynos/exynos_hdmi.c
index e05c86a..07ba387 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
@@ -523,6 +523,15 @@ static const struct hdmiphy_config hdmiphy_5420_configs[] = {
},
},
{
+ .pixel_clock = 85500000,
+ .conf = {
+ 0x01, 0xd1, 0x24, 0x11, 0x40, 0x40, 0xd0, 0xc8,
+ 0x84, 0xe8, 0xd6, 0xd8, 0x45, 0xa0, 0xac, 0x80,
+ 0x08, 0x80, 0x09, 0x84, 0x05, 0x02, 0x24, 0x86,
+ 0x54, 0x90, 0x24, 0x01, 0x00, 0x00, 0x01, 0x80,
+ },
+ },
+ {
.pixel_clock = 88750000,
.conf = {
0x01, 0xD1, 0x25, 0x11, 0x40, 0x18, 0xFF, 0xC8,
@@ -576,6 +585,15 @@ static const struct hdmiphy_config hdmiphy_5420_configs[] = {
0x54, 0x4B, 0x25, 0x03, 0x00, 0x80, 0x01, 0x80,
},
},
+ {
+ .pixel_clock = 162000000,
+ .conf = {
+ 0x01, 0x54, 0x87, 0x05, 0x40, 0x01, 0x00, 0xc8,
+ 0x82, 0xc8, 0xcb, 0xd8, 0x45, 0xa0, 0xac, 0x80,
+ 0x08, 0x80, 0x09, 0x84, 0x05, 0x02, 0x24, 0x86,
+ 0x54, 0x4c, 0x24, 0x01, 0x00, 0x00, 0x01, 0x80,
+ },
+ },
};
static struct hdmi_driver_data exynos5420_hdmi_driver_data = {
--
1.7.9.5
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