Comment # 28
on bug 77009
from Christian König
(In reply to comment #27) > "the signal gets more unstable" > > So it is the gpu that varies its freq. at higher divs (multipliers) and my > set is not tolerant of signal freq. fluctuations to keep data in sync? Yes. > If I understand this correctly- This is like in a micro-controller where > deviations in baud rate (a pll generated clock) leads to serial transmission > errors when > 5% deviation, for example. In micro-controllers: high > multipliers * internal pll = less stable freq >> less stable baud rate. Yes that's exactly the same problem just a completely different use case. Depending on the details of their electrical implementation all PLLs behave more or less like this. The trick is to know how to find the right numbers without violating the contrains.
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