On Sat, 2014-01-25 at 18:14 +0100, Jean-Francois Moine wrote:
> The predivider division factor of the register PLL_SERIAL_2 is in the
> range 0..3, the value 0 being used for a division by 1.
trivia:
> diff --git a/drivers/gpu/drm/i2c/tda998x_drv.c b/drivers/gpu/drm/i2c/tda998x_drv.c
[]
> @@ -886,6 +886,11 @@ tda998x_encoder_mode_set(struct drm_encoder *encoder,
> }
>
> div = 148500 / mode->clock;
> + if (div != 0) {
> + div--;
> + if (div > 3)
> + div = 3;
> + }
perhaps
clamp(div, 1, 4)
div--;
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