On Wed, 26 Feb 2025 15:30:41 -0300 Ariel D'Alessandro <ariel.dalessandro@xxxxxxxxxxxxx> wrote: > The TRANSTAB (Translation table base address) layout is different > depending on the legacy mode configuration. > > Currently, the defined values apply to the legacy mode. Let's rename > them so we can add the ones for no-legacy mode. > > Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@xxxxxxxxxxxxx> > --- > drivers/gpu/drm/panfrost/panfrost_regs.h | 19 ++++++++++++------- > 1 file changed, 12 insertions(+), 7 deletions(-) > > diff --git a/drivers/gpu/drm/panfrost/panfrost_regs.h b/drivers/gpu/drm/panfrost/panfrost_regs.h > index b5f279a19a08..4e6064d5feaa 100644 > --- a/drivers/gpu/drm/panfrost/panfrost_regs.h > +++ b/drivers/gpu/drm/panfrost/panfrost_regs.h > @@ -317,14 +317,19 @@ > #define MMU_AS_STRIDE (1 << MMU_AS_SHIFT) > > /* > - * Begin LPAE MMU TRANSTAB register values > + * Begin LPAE MMU TRANSTAB register values (legacy mode) > */ > -#define AS_TRANSTAB_LPAE_ADDR_SPACE_MASK 0xfffffffffffff000 > -#define AS_TRANSTAB_LPAE_ADRMODE_IDENTITY 0x2 > -#define AS_TRANSTAB_LPAE_ADRMODE_TABLE 0x3 > -#define AS_TRANSTAB_LPAE_ADRMODE_MASK 0x3 > -#define AS_TRANSTAB_LPAE_READ_INNER BIT(2) > -#define AS_TRANSTAB_LPAE_SHARE_OUTER BIT(4) > +#define AS_TRANSTAB_LEGACY_ADDR_SPACE_MASK 0xfffffffffffff000 > +#define AS_TRANSTAB_LEGACY_ADRMODE_IDENTITY 0x2 > +#define AS_TRANSTAB_LEGACY_ADRMODE_TABLE 0x3 > +#define AS_TRANSTAB_LEGACY_ADRMODE_MASK 0x3 > +#define AS_TRANSTAB_LEGACY_READ_INNER BIT(2) > +#define AS_TRANSTAB_LEGACY_SHARE_OUTER BIT(4) How about we keep AS_TRANSTAB_LPAE_ here and prefix the new reg values with AS_xxx_AARCH64_ when there's a collision between the two formats. > + > +/* > + * Begin LPAE MMU TRANSTAB register values (no-legacy mode) > + */ > +#define AS_TRANSTAB_LPAE_ADDR_SPACE_MASK 0xfffffffffffffff0 It looks like we're not use AS_TRANSTAB_LPAE_ADDR_SPACE_MASK, so I'm not sure it's worth defining the mask for the AARCH64 format. > > #define AS_STATUS_AS_ACTIVE 0x01 >
