Re: [PATCH] drm/radeon/uvd: revert lower msg&fb buffer requirements on UVD3

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On 15.10.2013 20:12, Christian König wrote:
From: Christian König <christian.koenig@xxxxxxx>

This only seem to work for H.264 but not for VC-1 streams.

Need to investigate further why exactly.


Thanks for the quick investigation. This is really strange. The corruption looks very similar to what I saw with VC-1 simple/main earlier, before it was disabled. Could there be some kind of connection?

Grigori

This reverts commit 4b40e5921230beb1951f04d2b1b92c4c88fbad43.

Signed-off-by: Christian König <christian.koenig@xxxxxxx>
---
  drivers/gpu/drm/radeon/radeon_cs.c  | 3 +--
  drivers/gpu/drm/radeon/radeon_uvd.c | 3 ++-
  drivers/gpu/drm/radeon/uvd_v1_0.c   | 4 ++--
  3 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/radeon/radeon_cs.c b/drivers/gpu/drm/radeon/radeon_cs.c
index 66c2228..80285e3 100644
--- a/drivers/gpu/drm/radeon/radeon_cs.c
+++ b/drivers/gpu/drm/radeon/radeon_cs.c
@@ -85,9 +85,8 @@ static int radeon_cs_parser_relocs(struct radeon_cs_parser *p)
  		   VRAM, also but everything into VRAM on AGP cards to avoid
  		   image corruptions */
  		if (p->ring == R600_RING_TYPE_UVD_INDEX &&
-		    p->rdev->family < CHIP_PALM &&
  		    (i == 0 || drm_pci_device_is_agp(p->rdev->ddev))) {
-
+			/* TODO: is this still needed for NI+ ? */
  			p->relocs[i].lobj.domain =
  				RADEON_GEM_DOMAIN_VRAM;

diff --git a/drivers/gpu/drm/radeon/radeon_uvd.c b/drivers/gpu/drm/radeon/radeon_uvd.c
index 4f2e73f..308eff5 100644
--- a/drivers/gpu/drm/radeon/radeon_uvd.c
+++ b/drivers/gpu/drm/radeon/radeon_uvd.c
@@ -476,7 +476,8 @@ static int radeon_uvd_cs_reloc(struct radeon_cs_parser *p,
  		return -EINVAL;
  	}

-	if (p->rdev->family < CHIP_PALM && (cmd == 0 || cmd == 0x3) &&
+	/* TODO: is this still necessary on NI+ ? */
+	if ((cmd == 0 || cmd == 0x3) &&
  	    (start >> 28) != (p->rdev->uvd.gpu_addr >> 28)) {
  		DRM_ERROR("msg/fb buffer %LX-%LX out of 256MB segment!\n",
  			  start, end);
diff --git a/drivers/gpu/drm/radeon/uvd_v1_0.c b/drivers/gpu/drm/radeon/uvd_v1_0.c
index 3100fa9..7266805 100644
--- a/drivers/gpu/drm/radeon/uvd_v1_0.c
+++ b/drivers/gpu/drm/radeon/uvd_v1_0.c
@@ -212,8 +212,8 @@ int uvd_v1_0_start(struct radeon_device *rdev)
  	/* enable VCPU clock */
  	WREG32(UVD_VCPU_CNTL,  1 << 9);

-	/* enable UMC and NC0 */
-	WREG32_P(UVD_LMI_CTRL2, 1 << 13, ~((1 << 8) | (1 << 13)));
+	/* enable UMC */
+	WREG32_P(UVD_LMI_CTRL2, 0, ~(1 << 8));

  	/* boot up the VCPU */
  	WREG32(UVD_SOFT_RESET, 0);


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