The HDMI phy has a power domain properly set in DT.
Writing the power controller register directly from the hdmi driver is
incorrect. The power domain framework should be used for that.
HHI is a collection of Amlogic devices, such as clocks, reset,
power domains and phys.
This is another step to get rid of HHI access in Amlogic display drivers
and possibly stop using the component API.
Signed-off-by: Jerome Brunet <jbrunet@xxxxxxxxxxxx>
---
This change depends on:
* f1ab099d6591 ("arm64: dts: amlogic: add power domain to hdmitx")
Time is needed for these changes to sink in u-boot and distros,
making this change safe to apply.
drivers/gpu/drm/meson/meson_dw_hdmi.c | 4 ----
1 file changed, 4 deletions(-)
diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c b/drivers/gpu/drm/meson/meson_dw_hdmi.c
index ef059c5ef520..6c18d97b8b16 100644
--- a/drivers/gpu/drm/meson/meson_dw_hdmi.c
+++ b/drivers/gpu/drm/meson/meson_dw_hdmi.c
@@ -111,7 +111,6 @@
#define HDMITX_TOP_G12A_OFFSET 0x8000
/* HHI Registers */
-#define HHI_MEM_PD_REG0 0x100 /* 0x40 */
#define HHI_HDMI_CLK_CNTL 0x1cc /* 0x73 */
#define HHI_HDMI_PHY_CNTL0 0x3a0 /* 0xe8 */
#define HHI_HDMI_PHY_CNTL1 0x3a4 /* 0xe9 */
@@ -423,9 +422,6 @@ static void meson_dw_hdmi_init(struct meson_dw_hdmi *meson_dw_hdmi)
/* Enable clocks */
regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, 0xffff, 0x100);
- /* Bring HDMITX MEM output of power down */
- regmap_update_bits(priv->hhi, HHI_MEM_PD_REG0, 0xff << 8, 0);
-
/* Bring out of reset */
regmap_write(meson_dw_hdmi->top, HDMITX_TOP_SW_RESET, 0);
msleep(20);
--
2.43.0
