Generate DRM/MSM headers on the fly during kernel build. This removes a need to push register changes to Mesa with the following manual synchronization step. Existing headers will be removed in the following commits (split away to ease reviews). Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx> --- drivers/gpu/drm/msm/.gitignore | 1 + drivers/gpu/drm/msm/Makefile | 97 +++++++++++++++++++++++++++++++++--------- 2 files changed, 77 insertions(+), 21 deletions(-) diff --git a/drivers/gpu/drm/msm/.gitignore b/drivers/gpu/drm/msm/.gitignore new file mode 100644 index 000000000000..9ab870da897d --- /dev/null +++ b/drivers/gpu/drm/msm/.gitignore @@ -0,0 +1 @@ +generated/ diff --git a/drivers/gpu/drm/msm/Makefile b/drivers/gpu/drm/msm/Makefile index 26ed4f443149..c861de58286c 100644 --- a/drivers/gpu/drm/msm/Makefile +++ b/drivers/gpu/drm/msm/Makefile @@ -1,10 +1,11 @@ # SPDX-License-Identifier: GPL-2.0 ccflags-y := -I $(srctree)/$(src) +ccflags-y += -I $(obj)/generated ccflags-y += -I $(srctree)/$(src)/disp/dpu1 ccflags-$(CONFIG_DRM_MSM_DSI) += -I $(srctree)/$(src)/dsi ccflags-$(CONFIG_DRM_MSM_DP) += -I $(srctree)/$(src)/dp -msm-y := \ +adreno-y := \ adreno/adreno_device.o \ adreno/adreno_gpu.o \ adreno/a2xx_gpu.o \ @@ -18,7 +19,11 @@ msm-y := \ adreno/a6xx_gmu.o \ adreno/a6xx_hfi.o \ -msm-$(CONFIG_DRM_MSM_HDMI) += \ +adreno-$(CONFIG_DEBUG_FS) += adreno/a5xx_debugfs.o \ + +adreno-$(CONFIG_DRM_MSM_GPU_STATE) += adreno/a6xx_gpu_state.o + +msm-display-$(CONFIG_DRM_MSM_HDMI) += \ hdmi/hdmi.o \ hdmi/hdmi_audio.o \ hdmi/hdmi_bridge.o \ @@ -31,7 +36,7 @@ msm-$(CONFIG_DRM_MSM_HDMI) += \ hdmi/hdmi_phy_8x74.o \ hdmi/hdmi_pll_8960.o \ -msm-$(CONFIG_DRM_MSM_MDP4) += \ +msm-display-$(CONFIG_DRM_MSM_MDP4) += \ disp/mdp4/mdp4_crtc.o \ disp/mdp4/mdp4_dsi_encoder.o \ disp/mdp4/mdp4_dtv_encoder.o \ @@ -42,7 +47,7 @@ msm-$(CONFIG_DRM_MSM_MDP4) += \ disp/mdp4/mdp4_kms.o \ disp/mdp4/mdp4_plane.o \ -msm-$(CONFIG_DRM_MSM_MDP5) += \ +msm-display-$(CONFIG_DRM_MSM_MDP5) += \ disp/mdp5/mdp5_cfg.o \ disp/mdp5/mdp5_cmd_encoder.o \ disp/mdp5/mdp5_ctl.o \ @@ -55,7 +60,7 @@ msm-$(CONFIG_DRM_MSM_MDP5) += \ disp/mdp5/mdp5_plane.o \ disp/mdp5/mdp5_smp.o \ -msm-$(CONFIG_DRM_MSM_DPU) += \ +msm-display-$(CONFIG_DRM_MSM_DPU) += \ disp/dpu1/dpu_core_perf.o \ disp/dpu1/dpu_crtc.o \ disp/dpu1/dpu_encoder.o \ @@ -85,14 +90,16 @@ msm-$(CONFIG_DRM_MSM_DPU) += \ disp/dpu1/dpu_vbif.o \ disp/dpu1/dpu_writeback.o -msm-$(CONFIG_DRM_MSM_MDSS) += \ +msm-display-$(CONFIG_DRM_MSM_MDSS) += \ msm_mdss.o \ -msm-y += \ +msm-display-y += \ disp/mdp_format.o \ disp/mdp_kms.o \ disp/msm_disp_snapshot.o \ disp/msm_disp_snapshot_util.o \ + +msm-y += \ msm_atomic.o \ msm_atomic_tracepoints.o \ msm_debugfs.o \ @@ -115,12 +122,12 @@ msm-y += \ msm_submitqueue.o \ msm_gpu_tracepoints.o \ -msm-$(CONFIG_DEBUG_FS) += adreno/a5xx_debugfs.o \ - dp/dp_debug.o +msm-$(CONFIG_DRM_FBDEV_EMULATION) += msm_fbdev.o -msm-$(CONFIG_DRM_MSM_GPU_STATE) += adreno/a6xx_gpu_state.o +msm-display-$(CONFIG_DEBUG_FS) += \ + dp/dp_debug.o -msm-$(CONFIG_DRM_MSM_DP)+= dp/dp_aux.o \ +msm-display-$(CONFIG_DRM_MSM_DP)+= dp/dp_aux.o \ dp/dp_catalog.o \ dp/dp_ctrl.o \ dp/dp_display.o \ @@ -130,21 +137,69 @@ msm-$(CONFIG_DRM_MSM_DP)+= dp/dp_aux.o \ dp/dp_audio.o \ dp/dp_utils.o -msm-$(CONFIG_DRM_FBDEV_EMULATION) += msm_fbdev.o - -msm-$(CONFIG_DRM_MSM_HDMI_HDCP) += hdmi/hdmi_hdcp.o +msm-display-$(CONFIG_DRM_MSM_HDMI_HDCP) += hdmi/hdmi_hdcp.o -msm-$(CONFIG_DRM_MSM_DSI) += dsi/dsi.o \ +msm-display-$(CONFIG_DRM_MSM_DSI) += dsi/dsi.o \ dsi/dsi_cfg.o \ dsi/dsi_host.o \ dsi/dsi_manager.o \ dsi/phy/dsi_phy.o -msm-$(CONFIG_DRM_MSM_DSI_28NM_PHY) += dsi/phy/dsi_phy_28nm.o -msm-$(CONFIG_DRM_MSM_DSI_20NM_PHY) += dsi/phy/dsi_phy_20nm.o -msm-$(CONFIG_DRM_MSM_DSI_28NM_8960_PHY) += dsi/phy/dsi_phy_28nm_8960.o -msm-$(CONFIG_DRM_MSM_DSI_14NM_PHY) += dsi/phy/dsi_phy_14nm.o -msm-$(CONFIG_DRM_MSM_DSI_10NM_PHY) += dsi/phy/dsi_phy_10nm.o -msm-$(CONFIG_DRM_MSM_DSI_7NM_PHY) += dsi/phy/dsi_phy_7nm.o +msm-display-$(CONFIG_DRM_MSM_DSI_28NM_PHY) += dsi/phy/dsi_phy_28nm.o +msm-display-$(CONFIG_DRM_MSM_DSI_20NM_PHY) += dsi/phy/dsi_phy_20nm.o +msm-display-$(CONFIG_DRM_MSM_DSI_28NM_8960_PHY) += dsi/phy/dsi_phy_28nm_8960.o +msm-display-$(CONFIG_DRM_MSM_DSI_14NM_PHY) += dsi/phy/dsi_phy_14nm.o +msm-display-$(CONFIG_DRM_MSM_DSI_10NM_PHY) += dsi/phy/dsi_phy_10nm.o +msm-display-$(CONFIG_DRM_MSM_DSI_7NM_PHY) += dsi/phy/dsi_phy_7nm.o + +msm-y += $(adreno-y) $(msm-display-y) obj-$(CONFIG_DRM_MSM) += msm.o + +quiet_cmd_headergen = GENHDR $@ + cmd_headergen = mkdir -p $(obj)/generated && $(PYTHON3) $(srctree)/$(src)/registers/gen_header.py --rnn $(srctree)/$(src)/registers --xml $< c-defines > $@ + +$(obj)/generated/%.xml.h: $(src)/registers/adreno/%.xml \ + $(src)/registers/adreno/adreno_common.xml \ + $(src)/registers/adreno/adreno_pm4.xml \ + $(src)/registers/freedreno_copyright.xml \ + $(src)/registers/gen_header.py \ + $(src)/registers/rules-fd.xsd \ + FORCE + $(call if_changed,headergen) + +$(obj)/generated/%.xml.h: $(src)/registers/display/%.xml \ + $(src)/registers/freedreno_copyright.xml \ + $(src)/registers/gen_header.py \ + $(src)/registers/rules-fd.xsd \ + FORCE + $(call if_changed,headergen) + +ADRENO_HEADERS = \ + generated/a2xx.xml.h \ + generated/a3xx.xml.h \ + generated/a4xx.xml.h \ + generated/a5xx.xml.h \ + generated/a6xx.xml.h \ + generated/a6xx_gmu.xml.h \ + generated/adreno_common.xml.h \ + generated/adreno_pm4.xml.h \ + +DISPLAY_HEADERS = \ + generated/dsi_phy_7nm.xml.h \ + generated/dsi_phy_10nm.xml.h \ + generated/dsi_phy_14nm.xml.h \ + generated/dsi_phy_20nm.xml.h \ + generated/dsi_phy_28nm_8960.xml.h \ + generated/dsi_phy_28nm.xml.h \ + generated/dsi.xml.h \ + generated/hdmi.xml.h \ + generated/mdp4.xml.h \ + generated/mdp5.xml.h \ + generated/mdp_common.xml.h \ + generated/sfpb.xml.h + +$(addprefix $(obj)/,$(adreno-y)): $(addprefix $(obj)/,$(ADRENO_HEADERS)) +$(addprefix $(obj)/,$(msm-display-y)): $(addprefix $(obj)/,$(DISPLAY_HEADERS)) + +targets += $(ADRENO_HEADERS) $(DISPLAY_HEADERS) -- 2.39.2
