On Mon, Feb 05, 2024 at 04:22:26PM +0100, Frank Oltmanns wrote: > According to the Allwinner User Manual, the Allwinner A64 requires > PLL-MIPI to run at 500MHz-1.4GHz. Add support for that to ccu_nkm. > > Signed-off-by: Frank Oltmanns <frank@xxxxxxxxxxxx> > --- > drivers/clk/sunxi-ng/ccu_nkm.c | 13 +++++++++++++ > drivers/clk/sunxi-ng/ccu_nkm.h | 2 ++ > 2 files changed, 15 insertions(+) > > diff --git a/drivers/clk/sunxi-ng/ccu_nkm.c b/drivers/clk/sunxi-ng/ccu_nkm.c > index 1168d894d636..7d135908d6e0 100644 > --- a/drivers/clk/sunxi-ng/ccu_nkm.c > +++ b/drivers/clk/sunxi-ng/ccu_nkm.c > @@ -181,6 +181,12 @@ static unsigned long ccu_nkm_round_rate(struct ccu_mux_internal *mux, > if (nkm->common.features & CCU_FEATURE_FIXED_POSTDIV) > rate *= nkm->fixed_post_div; > > + if (nkm->min_rate && rate < nkm->min_rate) > + rate = nkm->min_rate; > + > + if (nkm->max_rate && rate > nkm->max_rate) > + rate = nkm->max_rate; > + This is provided by the clock range already. If you call clk_hw_set_rate_range, it should work just fine. Maxime
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