Re: [Intel-gfx] [patch v2] drm/i915: fix a limit check in hsw_compute_wm_results()

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On Fri, Aug 09, 2013 at 01:29:33PM +0300, Ville Syrjälä wrote:
> On Fri, Aug 09, 2013 at 01:07:31PM +0300, Dan Carpenter wrote:
> > The '!' here was not intended.  Since '!' has higher precedence than
> > compare, it means the check is never true.
> > 
> > Signed-off-by: Dan Carpenter <dan.carpenter@xxxxxxxxxx>
> 
> Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> 
> The culprit for Daniel:
> 
> commit 71fff20ff1bb790f4defe0c880e028581ffab420
> Author: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> Date:   Tue Aug 6 22:24:03 2013 +0300
> 
>     drm/i915: Kill fbc_enable from hsw_lp_wm_results

Queued for -next, thanks for the patch.
-Daniel
> 
> > ---
> > v2: My first patch was wrong.
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > index 96234c6..0f5eb21 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -2685,7 +2685,7 @@ static void hsw_compute_wm_results(struct drm_device *dev,
> >  	 * a WM level. */
> >  	results->enable_fbc_wm = true;
> >  	for (level = 1; level <= max_level; level++) {
> > -		if (!lp_results[level - 1].fbc_val > lp_maximums->fbc) {
> > +		if (lp_results[level - 1].fbc_val > lp_maximums->fbc) {
> >  			results->enable_fbc_wm = false;
> >  			lp_results[level - 1].fbc_val = 0;
> >  		}
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> -- 
> Ville Syrjälä
> Intel OTC

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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