On Fri, Jul 12, 2013 at 5:51 PM, <alexdeucher@xxxxxxxxx> wrote:
> From: Alex Deucher <alexander.deucher@xxxxxxx>
>
> Covers requirements of all current asics.
>
> Signed-off-by: Alex Deucher <alexander.deucher@xxxxxxx>
> ---
> drivers/gpu/drm/radeon/radeon.h | 5 +++++
> drivers/gpu/drm/radeon/radeon_gart.c | 12 ++++++------
> 2 files changed, 11 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
> index 39d2ce6..875af79 100644
> --- a/drivers/gpu/drm/radeon/radeon.h
> +++ b/drivers/gpu/drm/radeon/radeon.h
> @@ -784,6 +784,11 @@ struct radeon_mec {
> /* number of entries in page table */
> #define RADEON_VM_PTE_COUNT (1 << RADEON_VM_BLOCK_SIZE)
>
> +/* PTBs (Page Table Blocks) need to be aligned to 32K */
> +#define RADEON_VM_PTB_ALIGN_SIZE 32768
> +#define RADEON_VM_PTB_ALIGN_MASK (RADEON_VM_PTB_ALIGN_SIZE - 1)
> +#define RADEON_VM_PTB_ALIGN(a) (((a) + RADEON_VM_PTB_ALIGN_MASK) & ~RADEON_VM_PTB_ALIGN_MASK)
> +
> struct radeon_vm {
> struct list_head list;
> struct list_head va;
> diff --git a/drivers/gpu/drm/radeon/radeon_gart.c b/drivers/gpu/drm/radeon/radeon_gart.c
> index 5ce190b..d9d31a3 100644
> --- a/drivers/gpu/drm/radeon/radeon_gart.c
> +++ b/drivers/gpu/drm/radeon/radeon_gart.c
> @@ -466,8 +466,8 @@ int radeon_vm_manager_init(struct radeon_device *rdev)
> size += rdev->vm_manager.max_pfn * 8;
> size *= 2;
> r = radeon_sa_bo_manager_init(rdev, &rdev->vm_manager.sa_manager,
> - RADEON_GPU_PAGE_ALIGN(size),
> - RADEON_GPU_PAGE_SIZE,
> + RADEON_VM_PTB_ALIGN(size),
> + RADEON_VM_PTB_ALIGN_SIZE,
> RADEON_GEM_DOMAIN_VRAM);
> if (r) {
> dev_err(rdev->dev, "failed to allocate vm bo (%dKB)\n",
> @@ -621,10 +621,10 @@ int radeon_vm_alloc_pt(struct radeon_device *rdev, struct radeon_vm *vm)
> }
>
> retry:
> - pd_size = RADEON_GPU_PAGE_ALIGN(radeon_vm_directory_size(rdev));
> + pd_size = RADEON_VM_PTB_ALIGN(radeon_vm_directory_size(rdev));
> r = radeon_sa_bo_new(rdev, &rdev->vm_manager.sa_manager,
> &vm->page_directory, pd_size,
> - RADEON_GPU_PAGE_SIZE, false);
> + RADEON_VM_PTB_ALIGN_SIZE, false);
> if (r == -ENOMEM) {
> r = radeon_vm_evict(rdev, vm);
> if (r)
> @@ -953,8 +953,8 @@ static int radeon_vm_update_pdes(struct radeon_device *rdev,
> retry:
> r = radeon_sa_bo_new(rdev, &rdev->vm_manager.sa_manager,
> &vm->page_tables[pt_idx],
> - RADEON_VM_PTE_COUNT * 8,
> - RADEON_GPU_PAGE_SIZE, false);
> + RADEON_VM_PTB_ALIGN(RADEON_VM_PTE_COUNT * 8),
> + RADEON_VM_PTB_ALIGN_SIZE, false);
You sure this part is needed ? Each pde contains 512 pte so needs
512*8bytes=4kbytes With that align it suddenly need 32kbytes for each
pde but only 4k of this 32k will be use right ?
Cheers,
Jerome
>
> if (r == -ENOMEM) {
> r = radeon_vm_evict(rdev, vm);
> --
> 1.7.7.5
>
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