On 7/8/2023 6:00 AM, Dmitry Baryshkov wrote:
All DSC_BLK_1_2 declarations incorrectly pass 0x29c as the block length. This includes the common block itself, enc subblocks and some empty space around. Change that to pass 0x4 instead, the length of common register block itself. Fixes: 0d1b10c63346 ("drm/msm/dpu: add DSC 1.2 hw blocks for relevant chipsets") Reported-by: Ryan McCann <quic_rmccann@xxxxxxxxxxx> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx> --- Changes since v2: - Added Reported-by tag. --- .../gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h | 8 ++++---- .../gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h | 2 +- .../gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h | 12 ++++++------ .../gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h | 8 ++++---- .../gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h | 8 ++++---- 5 files changed, 19 insertions(+), 19 deletions(-)
Reviewed-by: Abhinav Kumar <quic_abhinavk@xxxxxxxxxxx>