v2 of https://patchwork.freedesktop.org/series/119766/ Main change from v1 is the preparatory patch to handle GEN12_FF_MODE2. This is a register that can't be read back since it's affected by another workaround. Also add some other cleanups/fixes nearby. Tested on DG2 with intel_reg reading 0xb158 with a busy render engine. Now it's not losing the upper bit anymore. Also removed the Cc to stable. This will be handled separately once the patch is merged. With graphics version 12 not being affected, this needs to be backported only to kernel versions after DG2/MTL started to be supported. But in that case the preparatory patch would also need to be backported so it doesn't branch graphics version 12. Lucas De Marchi (6): drm/i915/gt: Move wal_get_fw_for_rmw() drm/i915/gt: Clear all bits from GEN12_FF_MODE2 drm/i915/gt: Fix context workarounds with non-masked regs drm/i915/gt: Drop read from GEN8_L3CNTLREG in ICL workaround drm/i915/gt: Enable read back on XEHP_FF_MODE2 drm/i915/gt: Remove bogus comment on IVB_FBC_RT_BASE_UPPER drivers/gpu/drm/i915/gt/intel_workarounds.c | 124 ++++++++++---------- 1 file changed, 63 insertions(+), 61 deletions(-) -- 2.40.1
