Hi Lucas, hope I got the latest version of this series. If not, please feel free to point me to the correct one. On Fri, Dec 16, 2022 at 10:07:42PM +0100, Lucas Stach wrote: > This IP block is found in the HDMI subsystem of the i.MX8MP SoC. It has a > full timing generator and can switch between different video sources. On > the i.MX8MP however the only supported source is the LCDIF. The block > just needs to be powered up and told about the polarity of the video > sync signals to act in bypass mode. > > Signed-off-by: Lucas Stach <l.stach@xxxxxxxxxxxxxx> > Tested-by: Marek Vasut <marex@xxxxxxx> I've successfully tested this patch on our custom i.MX8MP board. The test case was basically "cat /dev/urandom > /dev/fb1" with a 800x480 HDMI display. Therefore please feel free to add: Tested-by: Richard Leitner <richard.leitner@xxxxxxxxxxx> > --- > drivers/gpu/drm/bridge/imx/Kconfig | 7 + > drivers/gpu/drm/bridge/imx/Makefile | 1 + > drivers/gpu/drm/bridge/imx/imx8mp-hdmi-pvi.c | 202 +++++++++++++++++++ > 3 files changed, 210 insertions(+) > create mode 100644 drivers/gpu/drm/bridge/imx/imx8mp-hdmi-pvi.c >
