On Wednesday, 18 January 2023 14:22:10 CET Sascha Hauer wrote: > It's been some time since I last sent this series. This version fixes > a regression Dan Johansen reported. The reason turned out to be simple, > I used the YUV420 register values instead of the RGB ones. > > I realized that we cannot achieve several modes offered by my monitor > as these require pixelclocks that are slightly below the standard > pixelclocks. As these are lower than the standard clock rates the PLL > driver offers the clk driver falls back to a way lower frequency > which results in something the monitor can't display, so this series > now contains a patch to discard these unachievable modes. > > Sascha > > Changes since v2: > - Use correct register values for mpll_cfg > - Add patch to discard modes we cannot achieve > > Changes since v1: > - Allow non standard clock rates only on Synopsys phy as suggested by > Robin Murphy > > Sascha Hauer (3): > drm/rockchip: dw_hdmi: relax mode_valid hook > drm/rockchip: dw_hdmi: Add support for 4k@30 resolution > drm/rockchip: dw_hdmi: discard modes with unachievable pixelclocks > > drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 40 ++++++++++++++++----- > 1 file changed, 32 insertions(+), 8 deletions(-) For the whole series: Tested-by: Nicolas Frattaroli <frattaroli.nicolas@xxxxxxxxx> Tested on two monitors: Monitor 1 was an Iiyama ProLite G2773HS, which only does 1080p60 over HDMI. Testing on it, I found no regressions; all the old modes still showed up and the 1080p60 mode worked as expected. Monitor 2 was a Philips 328P, which does 4K30 over HDMI. Without the patches, the 4K modes were absent. With the patchset, the 4K modes are present, functional and picked by default. Great work! Cheers, Nicolas Frattaroli
