[PATCH v10 00/18] drm: Add Samsung MIPI DSIM bridge

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Hi,

thanks for the new update.

Am Mittwoch, 14. Dezember 2022, 13:58:49 CET schrieb Jagan Teki:
> This series supports common bridge support for Samsung MIPI DSIM
> which is used in Exynos and i.MX8MM SoC's.
> 
> The final bridge supports both the Exynos and i.MX8M Mini/Nano/Plus.
> 
> Patch 0001 - 0004: adding devm_drm_of_dsi_get_bridge
> 
> Patch 0005 - 0006: optional PHY, PMS_P offset
> 
> Patch 0007       : introduce hw_type
> 
> Patch 0008	 : fixing host init
> 
> Patch 0009	 : atomic_check
> 
> Patch 0010	 : input_bus_flags
> 
> Patch 0011	 : atomic_get_input_bus_fmts
> 
> Patch 0012 - 0013: component vs bridge
> 
> Patch 0014	 : DSIM bridge
> 
> Patch 0015 - 0016: i.MX8M Mini/Nano
> 
> Patch 0017 - 0018: i.MX8M Plus

Tested using LVDS bridges and works on:
* imx8mp-tqma8mpql-mba8mpxl (i.MX8M Plus)
* imx8mm-tqma8mqml-mba8mx (i.MX8M Mini)
* imx8mn-tqma8mqnl-mba8mx (i.MX8M Nano)

But I noticed that tqma8mqml and tqma8mqnl only have a stable output if I 
specify 'data-lanes = <0 1 2>' (not <0 1 2 3>!) on the DSI-LVDS-Bridge (TI 
SN65DSI83) input endpoint, e.g. 

dsi_lvds_bridge: bridge@2d {
	compatible = "ti,sn65dsi83";
	reg = <0x2d>;
	enable-gpios = <&gpio_delays 0 130000 0>;
	vcc-supply = <&reg_sn65dsi83_1v8>;
	status = "okay";
	ports {
		#address-cells = <1>;
		#size-cells = <0>;
		port@0 {
			reg = <0>;
			lvds_bridge_in: endpoint {
				data-lanes = <0 1 2>;
				remote-endpoint = <&mipi_dsi_out>;
			};
		};
		port@2 {
			reg = <2>;
			lvds_bridge_out: endpoint {
				remote-endpoint = <&panel_in_lvds0>;
			};
		};
	};
};

I have no idea if this is on the DSIM side or the DSI-LVDS bridge side. 
Register 0xe5 on sn65dsi83 shows that CHA_LPP_ERR and CHA_SOT_BIT_ERR error 
bits are set, indicating there are low level protocol and SoT leader sequence 
bit errors. I can't find any significant difference in sn65dsi83 driver 
compared to downstream-kernel, so I would assume something in DSIM driver is 
different.

Best regards,
Alexander

> Changes for v10:
> - rebase on drm-misc-next
> - add drm_of_dsi_find_panel_or_bridge
> - add devm_drm_of_dsi_get_bridge
> - fix host initialization (Thanks to Marek Szyprowski)
> - rearrange the tiny patches for easy to review
> - update simple names for enum hw_type
> - add is_hw_exynos macro
> - rework on commit messages
> 
> Changes for v9:
> - rebase on drm-misc-next
> - drop drm bridge attach fix for Exynos
> - added prepare_prev_first flag
> - added pre_enable_prev_first flag
> - fix bridge chain order for exynos
> - added fix for Exynos host init for first DSI transfer
> - added MEDIA_BUS_FMT_FIXED
> - return MEDIA_BUS_FMT_RGB888_1X24 output_fmt if supported output_fmt
>   list is unsupported.
> - added MEDIA_BUS_FMT_YUYV10_1X20
> - added MEDIA_BUS_FMT_YUYV12_1X24
> 
> Changes for v8:
> * fixed comment lines
> * fixed commit messages
> * fixed video mode bits
> * collect Marek Ack
> * fixed video mode bit names
> * update input formats logic
> * added imx8mplus support
> 
> Changes for v7:
> * fix the drm bridge attach chain for exynos drm dsi driver
> * fix the hw_type checking logic
> 
> Changes for v6:
> * handle previous bridge for exynos dsi while attaching bridge
> 
> Changes for v5:
> * bridge changes to support multi-arch
> * updated and clear commit messages
> * add hw_type via plat data
> * removed unneeded quirk
> * rebased on linux-next
> 
> Changes for v4:
> * include Inki Dae in MAINTAINERS
> * remove dsi_driver probe in exynos_drm_drv to support multi-arch build
> * update init handling to ensure host init done on first cmd transfer
> 
> Changes for v3:
> * fix the mult-arch build
> * fix dsi host init
> * updated commit messages
> 
> Changes for v2:
> * fix bridge handling
> * fix dsi host init
> * correct the commit messages
> 
> Tested in Engicam i.Core MX8M Mini SoM.
> 
> Repo:
> https://gitlab.com/openedev/kernel/-/commits/imx8mm-dsi-v10
> 
> v9:
> https://lore.kernel.org/all/20221209152343.180139-1-jagan@amarulasolutions.c
> om/
> 
> Any inputs?
> Jagan.
> 
> Jagan Teki (16):
>   drm: of: Lookup if child node has DSI panel or bridge
>   drm: bridge: panel: Add devm_drm_of_dsi_get_bridge helper
>   drm: exynos: dsi: Drop explicit call to bridge detach
>   drm: exynos: dsi: Switch to devm_drm_of_dsi_get_bridge
>   drm: exynos: dsi: Mark PHY as optional
>   drm: exynos: dsi: Add platform PLL_P (PMS_P) offset
>   drm: exynos: dsi: Introduce hw_type platform data
>   drm: exynos: dsi: Add atomic check
>   drm: exynos: dsi: Add input_bus_flags
>   drm: exynos: dsi: Add atomic_get_input_bus_fmts
>   drm: exynos: dsi: Consolidate component and bridge
>   drm: exynos: dsi: Add Exynos based host irq hooks
>   drm: bridge: Generalize Exynos-DSI driver into a Samsung DSIM bridge
>   dt-bindings: display: exynos: dsim: Add NXP i.MX8M Mini/Nano support
>   drm: bridge: samsung-dsim: Add i.MX8M Mini/Nano support
>   dt-bindings: display: exynos: dsim: Add NXP i.MX8M Plus support
> 
> Marek Szyprowski (1):
>   drm: exynos: dsi: Handle proper host initialization
> 
> Marek Vasut (1):
>   drm: bridge: samsung-dsim: Add i.MX8M Plus support
> 
>  .../bindings/display/exynos/exynos_dsim.txt   |    2 +
>  MAINTAINERS                                   |    9 +
>  drivers/gpu/drm/bridge/Kconfig                |   12 +
>  drivers/gpu/drm/bridge/Makefile               |    1 +
>  drivers/gpu/drm/bridge/panel.c                |   34 +
>  drivers/gpu/drm/bridge/samsung-dsim.c         | 1883 +++++++++++++++++
>  drivers/gpu/drm/drm_of.c                      |  113 +-
>  drivers/gpu/drm/exynos/Kconfig                |    1 +
>  drivers/gpu/drm/exynos/exynos_drm_dsi.c       | 1793 +---------------
>  include/drm/bridge/samsung-dsim.h             |  119 ++
>  include/drm/drm_bridge.h                      |    2 +
>  include/drm/drm_of.h                          |   12 +
>  12 files changed, 2285 insertions(+), 1696 deletions(-)
>  create mode 100644 drivers/gpu/drm/bridge/samsung-dsim.c
>  create mode 100644 include/drm/bridge/samsung-dsim.h





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